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Searched refs:BIFPLR3_0_MEM_BASE_LIMIT__MEM_BASE_31_20__SHIFT (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_sh_mask.h20694 #define BIFPLR3_0_MEM_BASE_LIMIT__MEM_BASE_31_20__SHIFT … macro
H A Dnbio_7_7_0_sh_mask.h71237 #define BIFPLR3_0_MEM_BASE_LIMIT__MEM_BASE_31_20__SHIFT … macro
H A Dnbio_7_2_0_sh_mask.h79207 #define BIFPLR3_0_MEM_BASE_LIMIT__MEM_BASE_31_20__SHIFT … macro