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Searched refs:BDW_L3_MISS (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/arch/x86/events/intel/
H A Dcore.c1001 #define BDW_L3_MISS (BDW_L3_MISS_LOCAL| \ macro
6435 BDW_L3_MISS|HSW_SNOOP_DRAM; in intel_pmu_init()
6436 hw_cache_extra_regs[C(LL)][C(OP_WRITE)][C(RESULT_MISS)] = HSW_DEMAND_WRITE|BDW_L3_MISS| in intel_pmu_init()