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Searched refs:BA0_MIDSR (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/sound/pci/
H A Dcs4281.c280 #define BA0_MIDSR 0x0494 /* MIDI Status (ro) */ macro
1680 (snd_cs4281_peekBA0(chip, BA0_MIDSR) & BA0_MIDSR_TBF) == 0) { in snd_cs4281_midi_output_trigger()
1778 while ((snd_cs4281_peekBA0(chip, BA0_MIDSR) & BA0_MIDSR_RBE) == 0) { in snd_cs4281_interrupt()
1784 while ((snd_cs4281_peekBA0(chip, BA0_MIDSR) & BA0_MIDSR_TBF) == 0) { in snd_cs4281_interrupt()
/openbmc/linux/sound/pci/cs46xx/
H A Dcs46xx.h89 #define BA0_MIDSR 0x00000494 macro
H A Dcs46xx_lib.c1390 while ((snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_RBE) == 0) { in snd_cs46xx_interrupt()
1396 while ((snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_TBF) == 0) { in snd_cs46xx_interrupt()
2635 (snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_TBF) == 0) { in snd_cs46xx_midi_output_trigger()