Searched refs:B5_XA_CSR (Results 1 – 2 of 2) sorted by relevance
198 #define B5_XA_CSR 0x029c /* 32 bit BMU Control/Status Register (xa) */ macro
795 outpd(ADDR(B5_XA_CSR),CSR_IRQ_CL_C) ; in fddi_isr()815 outpd(ADDR(B5_XA_CSR),CSR_IRQ_CL_F) ; in fddi_isr()