1 /*
2  * Copyright 2020 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #include <linux/debugfs.h>
25 #include <linux/firmware.h>
26 #include <linux/dma-mapping.h>
27 
28 #include "amdgpu.h"
29 #include "amdgpu_fw_attestation.h"
30 #include "amdgpu_psp.h"
31 #include "amdgpu_ucode.h"
32 #include "soc15_common.h"
33 
34 #define FW_ATTESTATION_DB_COOKIE        0x143b6a37
35 #define FW_ATTESTATION_RECORD_VALID	1
36 #define FW_ATTESTATION_MAX_SIZE		4096
37 
38 struct FW_ATT_DB_HEADER {
39 	uint32_t AttDbVersion;           /* version of the fwar feature */
40 	uint32_t AttDbCookie;            /* cookie as an extra check for corrupt data */
41 };
42 
43 struct FW_ATT_RECORD {
44 	uint16_t AttFwIdV1;              /* Legacy FW Type field */
45 	uint16_t AttFwIdV2;              /* V2 FW ID field */
46 	uint32_t AttFWVersion;           /* FW Version */
47 	uint16_t AttFWActiveFunctionID;  /* The VF ID (only in VF Attestation Table) */
48 	uint8_t  AttSource;              /* FW source indicator */
49 	uint8_t  RecordValid;            /* Indicates whether the record is a valid entry */
50 	uint32_t AttFwTaId;              /* Ta ID (only in TA Attestation Table) */
51 };
52 
amdgpu_fw_attestation_debugfs_read(struct file * f,char __user * buf,size_t size,loff_t * pos)53 static ssize_t amdgpu_fw_attestation_debugfs_read(struct file *f,
54 						  char __user *buf,
55 						  size_t size,
56 						  loff_t *pos)
57 {
58 	struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
59 	uint64_t records_addr = 0;
60 	uint64_t vram_pos = 0;
61 	struct FW_ATT_DB_HEADER fw_att_hdr = {0};
62 	struct FW_ATT_RECORD fw_att_record = {0};
63 
64 	if (size < sizeof(struct FW_ATT_RECORD)) {
65 		DRM_WARN("FW attestation input buffer not enough memory");
66 		return -EINVAL;
67 	}
68 
69 	if ((*pos + sizeof(struct FW_ATT_DB_HEADER)) >= FW_ATTESTATION_MAX_SIZE) {
70 		DRM_WARN("FW attestation out of bounds");
71 		return 0;
72 	}
73 
74 	if (psp_get_fw_attestation_records_addr(&adev->psp, &records_addr)) {
75 		DRM_WARN("Failed to get FW attestation record address");
76 		return -EINVAL;
77 	}
78 
79 	vram_pos =  records_addr - adev->gmc.vram_start;
80 
81 	if (*pos == 0) {
82 		amdgpu_device_vram_access(adev,
83 					  vram_pos,
84 					  (uint32_t *)&fw_att_hdr,
85 					  sizeof(struct FW_ATT_DB_HEADER),
86 					  false);
87 
88 		if (fw_att_hdr.AttDbCookie != FW_ATTESTATION_DB_COOKIE) {
89 			DRM_WARN("Invalid FW attestation cookie");
90 			return -EINVAL;
91 		}
92 
93 		DRM_INFO("FW attestation version = 0x%X", fw_att_hdr.AttDbVersion);
94 	}
95 
96 	amdgpu_device_vram_access(adev,
97 				  vram_pos + sizeof(struct FW_ATT_DB_HEADER) + *pos,
98 				  (uint32_t *)&fw_att_record,
99 				  sizeof(struct FW_ATT_RECORD),
100 				  false);
101 
102 	if (fw_att_record.RecordValid != FW_ATTESTATION_RECORD_VALID)
103 		return 0;
104 
105 	if (copy_to_user(buf, (void *)&fw_att_record, sizeof(struct FW_ATT_RECORD)))
106 		return -EINVAL;
107 
108 	*pos += sizeof(struct FW_ATT_RECORD);
109 
110 	return sizeof(struct FW_ATT_RECORD);
111 }
112 
113 static const struct file_operations amdgpu_fw_attestation_debugfs_ops = {
114 	.owner = THIS_MODULE,
115 	.read = amdgpu_fw_attestation_debugfs_read,
116 	.write = NULL,
117 	.llseek = default_llseek
118 };
119 
amdgpu_is_fw_attestation_supported(struct amdgpu_device * adev)120 static int amdgpu_is_fw_attestation_supported(struct amdgpu_device *adev)
121 {
122 	if (adev->flags & AMD_IS_APU)
123 		return 0;
124 
125 	if (adev->asic_type >= CHIP_SIENNA_CICHLID)
126 		return 1;
127 
128 	return 0;
129 }
130 
amdgpu_fw_attestation_debugfs_init(struct amdgpu_device * adev)131 void amdgpu_fw_attestation_debugfs_init(struct amdgpu_device *adev)
132 {
133 	if (!amdgpu_is_fw_attestation_supported(adev))
134 		return;
135 
136 	debugfs_create_file("amdgpu_fw_attestation",
137 			    0400,
138 			    adev_to_drm(adev)->primary->debugfs_root,
139 			    adev,
140 			    &amdgpu_fw_attestation_debugfs_ops);
141 }
142