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Searched refs:AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h28905 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h46932 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h50211 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h50153 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_1_0_sh_mask.h47917 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h54334 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h55335 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h56182 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h55953 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h973 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h64531 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h61604 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h50155 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h56989 #define AZF0STREAM15_AZALIA_LATENCY_COUNTER_CONTROL__AZALIA_LATENCY_COUNTER_RESET__SHIFT macro