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Searched refs:AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h12154 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h13412 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h13418 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h14034 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h64421 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h28188 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h49493 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_1_0_sh_mask.h47199 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h46214 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h49435 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h53616 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h54587 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h55434 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h594 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h55235 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h60886 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h63813 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h49437 #define AZALIA_CRC0_CHANNEL4__CRC_CHANNEL4__SHIFT … macro