Searched refs:AXUSER_BASE (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/crypto/hisilicon/zip/ |
| H A D | zip_main.c | 555 writel(AXUSER_BASE, base + QM_ARUSER_M_CFG_1); in hisi_zip_set_user_domain_and_cache()
557 writel(AXUSER_BASE, base + QM_AWUSER_M_CFG_1); in hisi_zip_set_user_domain_and_cache()
576 writel(AXUSER_BASE, base + HZIP_BD_RUSER_32_63); in hisi_zip_set_user_domain_and_cache()
577 writel(AXUSER_BASE, base + HZIP_BD_WUSER_32_63); in hisi_zip_set_user_domain_and_cache()
580 writel(AXUSER_BASE | AXUSER_SSV, base + HZIP_DATA_RUSER_32_63); in hisi_zip_set_user_domain_and_cache()
581 writel(AXUSER_BASE | AXUSER_SSV, base + HZIP_DATA_WUSER_32_63); in hisi_zip_set_user_domain_and_cache()
582 writel(AXUSER_BASE | AXUSER_SSV, base + HZIP_SGL_RUSER_32_63); in hisi_zip_set_user_domain_and_cache()
584 writel(AXUSER_BASE, base + HZIP_DATA_RUSER_32_63); in hisi_zip_set_user_domain_and_cache()
585 writel(AXUSER_BASE, base + HZIP_DATA_WUSER_32_63); in hisi_zip_set_user_domain_and_cache()
586 writel(AXUSER_BASE, base + HZIP_SGL_RUSER_32_63); in hisi_zip_set_user_domain_and_cache()
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| /openbmc/linux/include/linux/ |
| H A D | hisi_acc_qm.h | 25 #define AXUSER_BASE (AXUSER_SNOOP_ENABLE | \ macro
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| /openbmc/linux/drivers/crypto/hisilicon/sec2/ |
| H A D | sec_main.c | 596 writel(AXUSER_BASE, qm->io_base + QM_ARUSER_M_CFG_1); in sec_set_user_domain_and_cache()
598 writel(AXUSER_BASE, qm->io_base + QM_AWUSER_M_CFG_1); in sec_set_user_domain_and_cache()
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