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Searched refs:AUX_SW_CONTROL__AUX_SW_WR_BYTES_MASK (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h742 #define AUX_SW_CONTROL__AUX_SW_WR_BYTES_MASK 0x001f0000L macro
H A Ddce_8_0_sh_mask.h9419 #define AUX_SW_CONTROL__AUX_SW_WR_BYTES_MASK 0x1f0000 macro
H A Ddce_10_0_sh_mask.h8903 #define AUX_SW_CONTROL__AUX_SW_WR_BYTES_MASK 0x1f0000 macro
H A Ddce_11_0_sh_mask.h8601 #define AUX_SW_CONTROL__AUX_SW_WR_BYTES_MASK 0x1f0000 macro
H A Ddce_11_2_sh_mask.h9887 #define AUX_SW_CONTROL__AUX_SW_WR_BYTES_MASK 0x1f0000 macro