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Searched refs:AUX_DPHY_RX_CONTROL0 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.h41 SRI(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
138 uint32_t AUX_DPHY_RX_CONTROL0; member
H A Ddce_link_encoder.c636 addr = AUX_REG(AUX_DPHY_RX_CONTROL0); in aux_initialize()
641 AUX_DPHY_RX_CONTROL0, AUX_RX_RECEIVE_WINDOW); in aux_initialize()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_link_encoder.c335 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, enc->ctx->dc_bios->golden_table.aux_dphy_rx_control0_val); in enc2_hw_init()
341 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110); in enc2_hw_init()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_link_encoder.c245 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110); in enc3_hw_init()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dio_link_encoder.c92 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110); in enc32_hw_init()
H A Ddcn32_resource.h309 SRI_ARR(AUX_CONTROL, DP_AUX, id), SRI_ARR(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.h36 SRI(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
75 uint32_t AUX_DPHY_RX_CONTROL0; member
H A Ddcn10_link_encoder.c1420 AUX_REG_UPDATE(AUX_DPHY_RX_CONTROL0, in dcn10_aux_initialize()