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Searched refs:AUXN_IMPCAL__AUXN_IMPCAL_VALUE_MASK (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h718 #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE_MASK 0x000f0000L macro
H A Ddce_8_0_sh_mask.h3045 #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE_MASK 0xf0000 macro
H A Ddce_10_0_sh_mask.h3029 #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE_MASK 0xf0000 macro
H A Ddce_11_0_sh_mask.h3099 #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE_MASK 0xf0000 macro
H A Ddce_11_2_sh_mask.h3339 #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE_MASK 0xf0000 macro
H A Ddce_12_0_sh_mask.h9581 #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE_MASK macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h40245 #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE_MASK macro