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Searched refs:ATTR02__ATTR_PAL__SHIFT (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h385 #define ATTR02__ATTR_PAL__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h10884 #define ATTR02__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h11268 #define ATTR02__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h11080 #define ATTR02__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h12334 #define ATTR02__ATTR_PAL__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h64724 #define ATTR02__ATTR_PAL__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h27445 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h45472 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h48749 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h48691 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_1_0_sh_mask.h46385 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h52872 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h51952 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h54684 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h54492 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h380 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h63070 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h59996 #define ATTR02__ATTR_PAL__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h48693 #define ATTR02__ATTR_PAL__SHIFT … macro