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Searched refs:ATMEL_BASE_SDRAMC (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91sam9_sdramc.h18 #ifndef ATMEL_BASE_SDRAMC
19 #define ATMEL_BASE_SDRAMC ATMEL_BASE_SDRAMC0 macro
22 #define AT91_ASM_SDRAMC_MR ATMEL_BASE_SDRAMC
23 #define AT91_ASM_SDRAMC_TR (ATMEL_BASE_SDRAMC + 0x04)
24 #define AT91_ASM_SDRAMC_CR (ATMEL_BASE_SDRAMC + 0x08)
25 #define AT91_ASM_SDRAMC_MDR (ATMEL_BASE_SDRAMC + 0x24)
45 #define AT91_SDRAMC_MR (ATMEL_BASE_SDRAMC + 0x00) /* SDRAM Controller Mode Register */
55 #define AT91_SDRAMC_TR (ATMEL_BASE_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */
58 #define AT91_SDRAMC_CR (ATMEL_BASE_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */
91 #define AT91_SDRAMC_LPR (ATMEL_BASE_SDRAMC + 0x10) /* SDRAM Controller Low Power Register */
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H A Dat91sam9261.h74 #define ATMEL_BASE_SDRAMC 0xffffea00 macro
H A Dat91sam9rl.h75 #define ATMEL_BASE_SDRAMC 0xffffea00 macro
H A Dat91sam9260.h88 #define ATMEL_BASE_SDRAMC 0xffffea00 macro
/openbmc/u-boot/arch/arm/mach-at91/
H A Dsdram.c20 struct sdramc_reg *reg = (struct sdramc_reg *)ATMEL_BASE_SDRAMC; in sdramc_initialize()