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Searched refs:ATH79_CLK_DDR (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/mips/ath79/
H A Dclock.c39 [ATH79_CLK_DDR] = "ddr",
120 ath79_set_clk(ATH79_CLK_DDR, ddr_rate); in ar71xx_clocks_init()
140 ath79_set_ff_clk(ATH79_CLK_DDR, "ref", mult, div * ddr_div); in ar724x_clocks_init()
206 ath79_set_ff_clk(ATH79_CLK_DDR, "ref", ninit_mul, in ar933x_clocks_init()
340 ath79_set_clk(ATH79_CLK_DDR, ddr_rate); in ar934x_clocks_init()
429 ath79_set_clk(ATH79_CLK_DDR, ddr_rate); in qca953x_clocks_init()
512 ath79_set_clk(ATH79_CLK_DDR, ddr_rate); in qca955x_clocks_init()
614 ath79_set_clk(ATH79_CLK_DDR, ddr_rate); in qca956x_clocks_init()
/openbmc/linux/include/dt-bindings/clock/
H A Dath79-clk.h10 #define ATH79_CLK_DDR 1 macro