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Searched refs:ATC_L2_CACHE_4K_DSM_CNTL__SEC_COUNT__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_sh_mask.h660 #define ATC_L2_CACHE_4K_DSM_CNTL__SEC_COUNT__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h8847 #define ATC_L2_CACHE_4K_DSM_CNTL__SEC_COUNT__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h28944 #define ATC_L2_CACHE_4K_DSM_CNTL__SEC_COUNT__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_8_0_sh_mask.h19690 #define ATC_L2_CACHE_4K_DSM_CNTL__SEC_COUNT__SHIFT … macro
H A Dmmhub_1_7_sh_mask.h29426 #define ATC_L2_CACHE_4K_DSM_CNTL__SEC_COUNT__SHIFT … macro