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Searched refs:AT91_SDRAMC_ISR (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/soc/at91/
H A Dat91sam9_sdramc.h73 #define AT91_SDRAMC_ISR 0x20 /* SDRAM Controller Interrupt Status Register */ macro
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91sam9_sdramc.h108 #define AT91_SDRAMC_ISR (ATMEL_BASE_SDRAMC + 0x20) /* SDRAM Controller Interrupt Status Register */ macro