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Searched refs:AT91_PMC_PLL_CTRL0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/at91/
H A Dclk-sam9x60-pll.c132 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, in sam9x60_frac_pll_set()
167 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, AT91_PMC_PLL_CTRL0_ENPLL, 0); in sam9x60_frac_pll_unprepare()
277 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, in sam9x60_frac_pll_set_rate_chg()
344 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, in sam9x60_div_pll_set_div()
366 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_div_pll_set()
399 regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, in sam9x60_div_pll_unprepare()
420 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_div_pll_is_prepared()
512 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_div_pll_set_rate_chg()
568 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_div_pll_notifier_fn()
746 regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val); in sam9x60_clk_register_div_pll()
/openbmc/linux/arch/arm/mach-at91/
H A Dpm_suspend.S694 ldr tmp2, [pmc, #AT91_PMC_PLL_CTRL0]
711 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
714 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
723 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
725 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
778 ldr tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
786 str tmp1, [pmc, #AT91_PMC_PLL_CTRL0]
/openbmc/linux/include/linux/clk/
H A Dat91_pmc.h38 #define AT91_PMC_PLL_CTRL0 0x0C /* PLL Control Register 0 [for SAM9X60] */ macro