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Searched refs:AST_LPC_HICR5 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-aspeed/ast2400/
H A Dboard_common.c15 #define AST_LPC_HICR5 0x080 macro
72 val = readl(ASPEED_LPC_CTRL + AST_LPC_HICR5); in isolate_bmc()
74 writel(val, ASPEED_LPC_CTRL + AST_LPC_HICR5); in isolate_bmc()
/openbmc/u-boot/arch/arm/mach-aspeed/ast2500/
H A Dboard_common.c19 #define AST_LPC_HICR5 0x080 macro
82 val = readl(ASPEED_LPC_CTRL + AST_LPC_HICR5); in isolate_bmc()
84 writel(val, ASPEED_LPC_CTRL + AST_LPC_HICR5); in isolate_bmc()
/openbmc/openbmc/meta-phosphor/dynamic-layers/aspeed-layer/recipes-bsp/u-boot/files/
H A D0001-aspeed-Disable-unnecessary-features.patch46 +#define AST_LPC_HICR5 0x80
49 +/* AST_LPC_HICR5 : 0x80 Host Interface Control Register 5 */
197 + val = readl(AST_LPC_BASE + AST_LPC_HICR5);
199 + writel(val, AST_LPC_BASE + AST_LPC_HICR5);
271 + val = readl(AST_LPC_BASE + AST_LPC_HICR5);
273 + writel(val, AST_LPC_BASE + AST_LPC_HICR5);