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Searched refs:AST_GPIO_BASE (Results 1 – 3 of 3) sorted by relevance

/openbmc/openbmc/meta-yadro/meta-nicole/recipes-bsp/u-boot/files/
H A D0003-aspeed-add-gpio-support.patch147 + {AST_GPIO_BASE + 0x0000, AST_GPIO_BASE + 0x0008, AST_GPIO_BASE + 0x0040,
148 + AST_GPIO_BASE + 0x0060, AST_GPIO_BASE + 0x00C0},
150 + {AST_GPIO_BASE + 0x0020, AST_GPIO_BASE + 0x0028, AST_GPIO_BASE + 0x0048,
151 + AST_GPIO_BASE + 0x0068, AST_GPIO_BASE + 0x00C4},
153 + {AST_GPIO_BASE + 0x0070, AST_GPIO_BASE + 0x0098, AST_GPIO_BASE + 0x00B0,
154 + AST_GPIO_BASE + 0x0090, AST_GPIO_BASE + 0x00C8},
156 + {AST_GPIO_BASE + 0x0078, AST_GPIO_BASE + 0x00E8, AST_GPIO_BASE + 0x0100,
159 + {AST_GPIO_BASE + 0x0080, AST_GPIO_BASE + 0x0118, AST_GPIO_BASE + 0x0130,
162 + {AST_GPIO_BASE + 0x0088, AST_GPIO_BASE + 0x0148, AST_GPIO_BASE + 0x0160,
165 + {AST_GPIO_BASE + 0x01E0, AST_GPIO_BASE + 0x0178, AST_GPIO_BASE + 0x0190,
[all …]
/openbmc/u-boot/board/aspeed/slt_ast2600/
H A Dslt_ast2600.c12 #define AST_GPIO_BASE (0x1E780000) macro
13 #define AST_GPIOABCD_DRCTN (AST_GPIO_BASE + 0x004)
14 #define AST_GPIOEFGH_DRCTN (AST_GPIO_BASE + 0x024)
15 #define AST_GPIOMNOP_DRCTN (AST_GPIO_BASE + 0x07C)
16 #define AST_GPIOQRST_DRCTN (AST_GPIO_BASE + 0x084)
17 #define AST_GPIOUVWX_DRCTN (AST_GPIO_BASE + 0x08C)
18 #define AST_GPIOYZ_DRCTN (AST_GPIO_BASE + 0x1E4)
/openbmc/openbmc/meta-ingrasys/meta-zaius/recipes-bsp/u-boot/u-boot-aspeed/
H A D0001-board-aspeed-Add-reset_phy-for-Zaius.patch32 + reg = readl(AST_GPIO_BASE | 0x00);
33 + writel(reg & ~phy_reset_mask, AST_GPIO_BASE | 0x00);
35 + reg = readl(AST_GPIO_BASE | 0x04);
36 + writel(reg | phy_reset_mask, AST_GPIO_BASE | 0x04);
39 + reg = readl(AST_GPIO_BASE | 0x00);
40 + writel(reg | phy_reset_mask, AST_GPIO_BASE | 0x00);