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Searched refs:AST2600_SCU_RESET_CONTROL1 (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/watchdog/
H A Dwdt_aspeed.c55 #define AST2600_SCU_RESET_CONTROL1 (0x40 / 4) macro
387 awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1; in aspeed_2600_wdt_class_init()
410 awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1; in aspeed_1030_wdt_class_init()
433 awc->reset_ctrl_reg = AST2600_SCU_RESET_CONTROL1; in aspeed_2700_wdt_class_init()