Searched refs:ASPEED_PCIE_PHY_CTRL1 (Results 1 – 1 of 1) sorted by relevance
629 #define ASPEED_PCIE_PHY_CTRL1 0x30 macro648 case ASPEED_PCIE_PHY_CTRL1: in aspeed_pcie_phy_read()684 case ASPEED_PCIE_PHY_CTRL1: /* 0x30 == root port, else bridge */ in aspeed_pcie_phy_write()