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Searched refs:AR_SREV_9280_20_OR_LATER (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dar9002_hw.c44 } else if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_mode_regs()
69 if (!AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_mode_regs()
210 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_configpcipowersave()
418 if (AR_SREV_9280_20_OR_LATER(ah)) in ar9002_hw_attach_ops()
H A Deeprom_def.c425 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_gain()
448 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_gain()
508 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_board_values()
562 if (!AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_def_set_board_values()
579 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_board_values()
608 if (AR_SREV_9280_20_OR_LATER(ah) && in ath9k_hw_def_set_board_values()
706 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_change_gain_boundary_setting()
745 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_adjust_pdadc_values()
1182 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_def_set_txpower()
H A Dar5008_phy.c174 BUG_ON(AR_SREV_9280_20_OR_LATER(ah)); in ar5008_hw_force_bias()
501 if (AR_SREV_9280_20_OR_LATER(ah)) in ar5008_hw_rf_alloc_ext_banks()
539 if (AR_SREV_9280_20_OR_LATER(ah)) in ar5008_hw_set_rf_regs()
647 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar5008_hw_override_ini()
669 if (AR_SREV_9280_20_OR_LATER(ah)) in ar5008_hw_override_ini()
838 if (!AR_SREV_9280_20_OR_LATER(ah)) in ar5008_hw_set_rfmode()
H A Dcommon-init.c203 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_cmn_setup_ht_cap()
H A Dtx99.c270 if (!AR_SREV_9280_20_OR_LATER(sc->sc_ah)) in ath9k_tx99_init_debug()
H A Dar9002_calib.c856 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_cal()
879 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_cal()
989 if (AR_SREV_9280_20_OR_LATER(ah)) { in ar9002_hw_init_cal_settings()
H A Dbtcoex.c158 } else if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_btcoex_init_scheme()
H A Dhw.c1683 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_init_mfp()
1957 if (AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_reset()
2535 else if (!AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_fill_cap_info()
2712 if (AR_SREV_9280_20_OR_LATER(ah) || in ath9k_hw_gpio_cfg_output_mux()
3370 if (AR_SREV_9280_20_OR_LATER(ah)) { in ath9k_hw_name()
H A Deeprom.h113 #define OLC_FOR_AR9280_20_LATER(_ah) (AR_SREV_9280_20_OR_LATER(_ah) && \
H A Deeprom.c611 if (AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_get_gain_boundaries_pdadcs()
H A Dmac.c585 if (AR_SREV_9280_20_OR_LATER(ah)) in ath9k_hw_rxprocdesc()
H A Dinit.c972 if (AR_SREV_9280_20_OR_LATER(ah)) in ath9k_set_hw_capab()
H A Dreg.h851 #define AR_SREV_9280_20_OR_LATER(_ah) \ macro
H A Dxmit.c1231 } else if (AR_SREV_9280_20_OR_LATER(ah)) { in ath_get_rate_txpower()
1249 if (!max_power && !AR_SREV_9280_20_OR_LATER(ah)) in ath_get_rate_txpower()