Searched refs:AR_CH0_DDR_DPLL2 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/net/wireless/ath/ath9k/ | ||
| H A D | reg.h | 1310 #define AR_CH0_DDR_DPLL2 0x16244 macro |
| H A D | hw.c | 811 REG_WRITE(ah, AR_CH0_DDR_DPLL2, ddr_dpll2); in ath9k_hw_init_pll() |