Searched refs:ARM_SMMU_PRIQ_IRQ_CFG0 (Results 1 – 2 of 2) sorted by relevance
157 #define ARM_SMMU_PRIQ_IRQ_CFG0 0xd0 macro
63 ARM_SMMU_PRIQ_IRQ_CFG0,3172 writeq_relaxed(0, smmu->base + ARM_SMMU_PRIQ_IRQ_CFG0); in arm_smmu_setup_msis()