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Searched refs:ARM_CP_NOP (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/target/arm/
H A Dhelper.c466 .opc1 = CP_ANY, .opc2 = CP_ANY, .access = PL1_RW, .type = ARM_CP_NOP },
468 .opc1 = CP_ANY, .opc2 = CP_ANY, .access = PL1_RW, .type = ARM_CP_NOP },
470 .opc1 = CP_ANY, .opc2 = CP_ANY, .access = PL1_RW, .type = ARM_CP_NOP },
472 .opc1 = CP_ANY, .opc2 = CP_ANY, .access = PL1_RW, .type = ARM_CP_NOP },
476 .type = ARM_CP_NOP | ARM_CP_OVERRIDE },
519 .opc1 = 0, .opc2 = 0, .access = PL1_RW, .type = ARM_CP_NOP },
521 .opc1 = 0, .opc2 = 1, .access = PL1_RW, .type = ARM_CP_NOP },
632 .access = PL1_W, .type = ARM_CP_NOP },
641 .access = PL0_W, .type = ARM_CP_NOP },
643 .access = PL0_W, .type = ARM_CP_NOP },
[all …]
H A Dcpregs.h38 ARM_CP_NOP = 0x0001, enumerator
/openbmc/qemu/target/arm/tcg/
H A Dcpu32.c401 .access = PL1_W, .resetvalue = 0, .type = ARM_CP_NOP },
403 .access = PL1_W, .resetvalue = 0, .type = ARM_CP_NOP },
585 .opc2 = 0, .access = PL1_W, .type = ARM_CP_NOP },
705 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
708 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
711 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
714 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
717 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
720 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
H A Dtlb-insns.c1205 .access = PL2_W, .type = ARM_CP_NOP | ARM_CP_ADD_TLBI_NXS },
1208 .access = PL2_W, .type = ARM_CP_NOP | ARM_CP_ADD_TLBI_NXS },
1211 .access = PL2_W, .type = ARM_CP_NOP | ARM_CP_ADD_TLBI_NXS },
1214 .access = PL2_W, .type = ARM_CP_NOP | ARM_CP_ADD_TLBI_NXS },
H A Dtranslate.c3079 case ARM_CP_NOP: in do_coproc_insn()
H A Dtranslate-a64.c2658 case ARM_CP_NOP: in handle_sys()