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Searched refs:ARMV7M_EXCP_SVC (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/hw/intc/
H A Darmv7m_nvic.c157 exc == ARMV7M_EXCP_SVC || in exc_is_banked()
1137 if (s->sec_vectors[ARMV7M_EXCP_SVC].active) { in nvic_readl()
1152 if (s->sec_vectors[ARMV7M_EXCP_SVC].pending) { in nvic_readl()
1190 if (s->vectors[ARMV7M_EXCP_SVC].active) { in nvic_readl()
1205 if (s->vectors[ARMV7M_EXCP_SVC].pending) { in nvic_readl()
1720 s->sec_vectors[ARMV7M_EXCP_SVC].active = (value & (1 << 7)) != 0; in nvic_writel()
1728 s->sec_vectors[ARMV7M_EXCP_SVC].pending = (value & (1 << 15)) != 0; in nvic_writel()
1745 s->vectors[ARMV7M_EXCP_SVC].active = (value & (1 << 7)) != 0; in nvic_writel()
1750 s->vectors[ARMV7M_EXCP_SVC].pending = (value & (1 << 15)) != 0; in nvic_writel()
2180 case ARMV7M_EXCP_SVC: in shpr_bank()
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/openbmc/qemu/target/arm/
H A Dcpu.h74 #define ARMV7M_EXCP_SVC 11 macro
/openbmc/qemu/target/arm/tcg/
H A Dm_helper.c2250 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC, env->v7m.secure); in arm_v7m_cpu_do_interrupt()