Home
last modified time | relevance | path

Searched refs:APBC_PWM0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/mmp/
H A Dclk-of-pxa168.c25 #define APBC_PWM0 0xc macro
166 …{0, "pwm0_mux", pwm_parent_names, ARRAY_SIZE(pwm_parent_names), CLK_SET_RATE_PARENT, APBC_PWM0, 4,…
187 …{PXA168_CLK_PWM0, "pwm0_clk", "pwm0_mux", CLK_SET_RATE_PARENT, APBC_PWM0, 0x3, 0x3, 0x0, 0, &pwm0_…
H A Dclk-of-pxa910.c28 #define APBC_PWM0 0xc macro
145 …{PXA910_CLK_PWM0, "pwm0_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM0, 0x3, 0x3, 0x0, 0, &reset_…
H A Dclk-of-mmp2.c39 #define APBC_PWM0 0x3c macro
260 …{MMP2_CLK_PWM0, "pwm0_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM0, 0x7, 0x3, 0x0, 0, &reset_lo…