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Searched refs:AHB_RESET_OFFSET_DRC0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun8i_a83t.h282 #define AHB_RESET_OFFSET_DRC0 25 macro
H A Dclock_sun6i.h472 #define AHB_RESET_OFFSET_DRC0 25 macro
/openbmc/u-boot/drivers/video/sunxi/
H A Dsunxi_display.c865 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DRC0);