Searched refs:ADMA (Results 1 – 12 of 12) sorted by relevance
10 ADMAIF is the interface between ADMA and AHUB. Each ADMA channel12 ADMAIF channel. ADMA channel sending data to AHUB pairs with ADMAIF13 Tx channel and ADMA channel receiving data from AHUB pairs with
13 external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
7 title: NVIDIA Tegra Audio DMA (ADMA) controller42 description: Must contain one entry for the ADMA module clock
31 * 18~21 is ADMA irq
90 #define ADMA 81 macro
124 Config to enable ADMAIF which is the interface between ADMA and125 Audio Hub (AHUB). Each ADMA channel that sends/receives data to/126 from AHUB must interface through an ADMAIF channel. ADMA channel128 ADMA channel receiving data from AHUB pairs with an ADMAIF Rx
6 by ADMA driver for configuration of RAID-6 H/W capabilities of
79 tristate "AMCC PPC440SPe ADMA support"436 Say Y here if you enabled MMP ADMA, otherwise say N.631 tristate "NVIDIA Tegra210 ADMA support"636 Support for the NVIDIA Tegra210/Tegra186/Tegra194/Tegra234 ADMA
339 ADMA, enumerator2333 type = ADMA; in nv_init_one()2371 if (type == ADMA) { in nv_init_one()2406 if (hpriv->type == ADMA) { in nv_pci_device_resume()
367 tristate "Pacific Digital ADMA support"370 This option enables support for Pacific Digital ADMA controllers
30 - 8 ADMA (Xilinx zDMA) channels
273 bool "ADMA support for OMAP HS MMC"