1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2014 Google Inc.
4 * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
5 *
6 * Modified from coreboot src/soc/intel/baytrail/acpi/xhci.asl
7 */
8
9/* XHCI Controller 0:14.0 */
10
11Device (XHCI)
12{
13	Name(_ADR, 0x00140000)
14
15	/* Power Resources for Wake */
16	Name(_PRW, Package() { 13, 3 })
17
18	/* Highest D state in S3 state */
19	Name(_S3D, 3)
20
21	Device (RHUB)
22	{
23		Name(_ADR, 0x00000000)
24
25		Device (PRT1) { Name(_ADR, 1) }	/* USB Port 0 */
26		Device (PRT2) { Name(_ADR, 2) }	/* USB Port 1 */
27		Device (PRT3) { Name(_ADR, 3) }	/* USB Port 2 */
28		Device (PRT4) { Name(_ADR, 4) }	/* USB Port 3 */
29	}
30}
31