1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Test for VMX-pmu perf capability msr
4 *
5 * Copyright (C) 2021 Intel Corporation
6 *
7 * Test to check the effect of various CPUID settings on
8 * MSR_IA32_PERF_CAPABILITIES MSR, and check that what
9 * we write with KVM_SET_MSR is _not_ modified by the guest
10 * and check it can be retrieved with KVM_GET_MSR, also test
11 * the invalid LBR formats are rejected.
12 */
13 #define _GNU_SOURCE /* for program_invocation_short_name */
14 #include <sys/ioctl.h>
15
16 #include <linux/bitmap.h>
17
18 #include "kvm_util.h"
19 #include "vmx.h"
20
21 union perf_capabilities {
22 struct {
23 u64 lbr_format:6;
24 u64 pebs_trap:1;
25 u64 pebs_arch_reg:1;
26 u64 pebs_format:4;
27 u64 smm_freeze:1;
28 u64 full_width_write:1;
29 u64 pebs_baseline:1;
30 u64 perf_metrics:1;
31 u64 pebs_output_pt_available:1;
32 u64 anythread_deprecated:1;
33 };
34 u64 capabilities;
35 };
36
37 /*
38 * The LBR format and most PEBS features are immutable, all other features are
39 * fungible (if supported by the host and KVM).
40 */
41 static const union perf_capabilities immutable_caps = {
42 .lbr_format = -1,
43 .pebs_trap = 1,
44 .pebs_arch_reg = 1,
45 .pebs_format = -1,
46 .pebs_baseline = 1,
47 };
48
49 static const union perf_capabilities format_caps = {
50 .lbr_format = -1,
51 .pebs_format = -1,
52 };
53
guest_test_perf_capabilities_gp(uint64_t val)54 static void guest_test_perf_capabilities_gp(uint64_t val)
55 {
56 uint8_t vector = wrmsr_safe(MSR_IA32_PERF_CAPABILITIES, val);
57
58 __GUEST_ASSERT(vector == GP_VECTOR,
59 "Expected #GP for value '0x%llx', got vector '0x%x'",
60 val, vector);
61 }
62
guest_code(uint64_t current_val)63 static void guest_code(uint64_t current_val)
64 {
65 int i;
66
67 guest_test_perf_capabilities_gp(current_val);
68 guest_test_perf_capabilities_gp(0);
69
70 for (i = 0; i < 64; i++)
71 guest_test_perf_capabilities_gp(current_val ^ BIT_ULL(i));
72
73 GUEST_DONE();
74 }
75
76 /*
77 * Verify that guest WRMSRs to PERF_CAPABILITIES #GP regardless of the value
78 * written, that the guest always sees the userspace controlled value, and that
79 * PERF_CAPABILITIES is immutable after KVM_RUN.
80 */
test_guest_wrmsr_perf_capabilities(union perf_capabilities host_cap)81 static void test_guest_wrmsr_perf_capabilities(union perf_capabilities host_cap)
82 {
83 struct kvm_vcpu *vcpu;
84 struct kvm_vm *vm = vm_create_with_one_vcpu(&vcpu, guest_code);
85 struct ucall uc;
86 int r, i;
87
88 vm_init_descriptor_tables(vm);
89 vcpu_init_descriptor_tables(vcpu);
90
91 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
92
93 vcpu_args_set(vcpu, 1, host_cap.capabilities);
94 vcpu_run(vcpu);
95
96 switch (get_ucall(vcpu, &uc)) {
97 case UCALL_ABORT:
98 REPORT_GUEST_ASSERT(uc);
99 break;
100 case UCALL_DONE:
101 break;
102 default:
103 TEST_FAIL("Unexpected ucall: %lu", uc.cmd);
104 }
105
106 TEST_ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES),
107 host_cap.capabilities);
108
109 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
110
111 r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, 0);
112 TEST_ASSERT(!r, "Post-KVM_RUN write '0' didn't fail");
113
114 for (i = 0; i < 64; i++) {
115 r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES,
116 host_cap.capabilities ^ BIT_ULL(i));
117 TEST_ASSERT(!r, "Post-KVM_RUN write '0x%llx'didn't fail",
118 host_cap.capabilities ^ BIT_ULL(i));
119 }
120
121 kvm_vm_free(vm);
122 }
123
124 /*
125 * Verify KVM allows writing PERF_CAPABILITIES with all KVM-supported features
126 * enabled, as well as '0' (to disable all features).
127 */
test_basic_perf_capabilities(union perf_capabilities host_cap)128 static void test_basic_perf_capabilities(union perf_capabilities host_cap)
129 {
130 struct kvm_vcpu *vcpu;
131 struct kvm_vm *vm = vm_create_with_one_vcpu(&vcpu, NULL);
132
133 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, 0);
134 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
135
136 kvm_vm_free(vm);
137 }
138
test_fungible_perf_capabilities(union perf_capabilities host_cap)139 static void test_fungible_perf_capabilities(union perf_capabilities host_cap)
140 {
141 const uint64_t fungible_caps = host_cap.capabilities & ~immutable_caps.capabilities;
142
143 struct kvm_vcpu *vcpu;
144 struct kvm_vm *vm = vm_create_with_one_vcpu(&vcpu, NULL);
145 int bit;
146
147 for_each_set_bit(bit, &fungible_caps, 64) {
148 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, BIT_ULL(bit));
149 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES,
150 host_cap.capabilities & ~BIT_ULL(bit));
151 }
152 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
153
154 kvm_vm_free(vm);
155 }
156
157 /*
158 * Verify KVM rejects attempts to set unsupported and/or immutable features in
159 * PERF_CAPABILITIES. Note, LBR format and PEBS format need to be validated
160 * separately as they are multi-bit values, e.g. toggling or setting a single
161 * bit can generate a false positive without dedicated safeguards.
162 */
test_immutable_perf_capabilities(union perf_capabilities host_cap)163 static void test_immutable_perf_capabilities(union perf_capabilities host_cap)
164 {
165 const uint64_t reserved_caps = (~host_cap.capabilities |
166 immutable_caps.capabilities) &
167 ~format_caps.capabilities;
168
169 struct kvm_vcpu *vcpu;
170 struct kvm_vm *vm = vm_create_with_one_vcpu(&vcpu, NULL);
171 union perf_capabilities val = host_cap;
172 int r, bit;
173
174 for_each_set_bit(bit, &reserved_caps, 64) {
175 r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES,
176 host_cap.capabilities ^ BIT_ULL(bit));
177 TEST_ASSERT(!r, "%s immutable feature 0x%llx (bit %d) didn't fail",
178 host_cap.capabilities & BIT_ULL(bit) ? "Setting" : "Clearing",
179 BIT_ULL(bit), bit);
180 }
181
182 /*
183 * KVM only supports the host's native LBR format, as well as '0' (to
184 * disable LBR support). Verify KVM rejects all other LBR formats.
185 */
186 for (val.lbr_format = 1; val.lbr_format; val.lbr_format++) {
187 if (val.lbr_format == host_cap.lbr_format)
188 continue;
189
190 r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, val.capabilities);
191 TEST_ASSERT(!r, "Bad LBR FMT = 0x%x didn't fail, host = 0x%x",
192 val.lbr_format, host_cap.lbr_format);
193 }
194
195 /* Ditto for the PEBS format. */
196 for (val.pebs_format = 1; val.pebs_format; val.pebs_format++) {
197 if (val.pebs_format == host_cap.pebs_format)
198 continue;
199
200 r = _vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, val.capabilities);
201 TEST_ASSERT(!r, "Bad PEBS FMT = 0x%x didn't fail, host = 0x%x",
202 val.pebs_format, host_cap.pebs_format);
203 }
204
205 kvm_vm_free(vm);
206 }
207
208 /*
209 * Test that LBR MSRs are writable when LBRs are enabled, and then verify that
210 * disabling the vPMU via CPUID also disables LBR support. Set bits 2:0 of
211 * LBR_TOS as those bits are writable across all uarch implementations (arch
212 * LBRs will need to poke a different MSR).
213 */
test_lbr_perf_capabilities(union perf_capabilities host_cap)214 static void test_lbr_perf_capabilities(union perf_capabilities host_cap)
215 {
216 struct kvm_vcpu *vcpu;
217 struct kvm_vm *vm;
218 int r;
219
220 if (!host_cap.lbr_format)
221 return;
222
223 vm = vm_create_with_one_vcpu(&vcpu, NULL);
224
225 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities);
226 vcpu_set_msr(vcpu, MSR_LBR_TOS, 7);
227
228 vcpu_clear_cpuid_entry(vcpu, X86_PROPERTY_PMU_VERSION.function);
229
230 r = _vcpu_set_msr(vcpu, MSR_LBR_TOS, 7);
231 TEST_ASSERT(!r, "Writing LBR_TOS should fail after disabling vPMU");
232
233 kvm_vm_free(vm);
234 }
235
main(int argc,char * argv[])236 int main(int argc, char *argv[])
237 {
238 union perf_capabilities host_cap;
239
240 TEST_REQUIRE(get_kvm_param_bool("enable_pmu"));
241 TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_PDCM));
242
243 TEST_REQUIRE(kvm_cpu_has_p(X86_PROPERTY_PMU_VERSION));
244 TEST_REQUIRE(kvm_cpu_property(X86_PROPERTY_PMU_VERSION) > 0);
245
246 host_cap.capabilities = kvm_get_feature_msr(MSR_IA32_PERF_CAPABILITIES);
247
248 TEST_ASSERT(host_cap.full_width_write,
249 "Full-width writes should always be supported");
250
251 test_basic_perf_capabilities(host_cap);
252 test_fungible_perf_capabilities(host_cap);
253 test_immutable_perf_capabilities(host_cap);
254 test_guest_wrmsr_perf_capabilities(host_cap);
255 test_lbr_perf_capabilities(host_cap);
256 }
257