xref: /openbmc/linux/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi (revision 060f35a317ef09101b128f399dce7ed13d019461)
1// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2/*
3 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
4 */
5
6#include <dt-bindings/input/input.h>
7#include <dt-bindings/pwm/pwm.h>
8
9&adc {
10	status = "disabled";
11};
12
13&dac {
14	status = "disabled";
15};
16
17&gpiob {
18	/*
19	 * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
20	 * GPIO line, however the STM32 UART driver assumes RX happens
21	 * during TX anyway and that it only controls drive enable DE
22	 * line. Hence, the RX is always enabled here.
23	 */
24	rs485-rx-en-hog {
25		gpio-hog;
26		gpios = <8 0>;
27		output-low;
28		line-name = "rs485-rx-en";
29	};
30};
31
32&gpiod {
33	gpio-line-names = "", "", "", "",
34			  "", "", "DHCOM-B", "",
35			  "", "", "", "DRC02-Out1",
36			  "DRC02-Out2", "", "", "";
37};
38
39&gpioi {
40	gpio-line-names = "DRC02-In1", "DHCOM-O", "DHCOM-H", "DHCOM-I",
41			  "DHCOM-R", "DHCOM-M", "", "",
42			  "DRC02-In2", "", "", "",
43			  "", "", "", "";
44
45	/*
46	 * NOTE: The USB Hub on the DRC02 needs a reset signal to be
47	 * pulled high in order to be detected by the USB Controller.
48	 * This signal should be handled by USB power sequencing in
49	 * order to reset the Hub when USB bus is powered down, but
50	 * so far there is no such functionality.
51	 */
52	usb-hub-hog {
53		gpio-hog;
54		gpios = <2 0>;
55		output-high;
56		line-name = "usb-hub-reset";
57	};
58};
59
60&i2c2 {
61	pinctrl-names = "default";
62	pinctrl-0 = <&i2c2_pins_a>;
63	i2c-scl-rising-time-ns = <185>;
64	i2c-scl-falling-time-ns = <20>;
65	status = "okay";
66	/* spare dmas for other usage */
67	/delete-property/dmas;
68	/delete-property/dma-names;
69	status = "okay";
70
71	eeprom@50 {
72		compatible = "atmel,24c04";
73		reg = <0x50>;
74		pagesize = <16>;
75	};
76};
77
78&i2c4 {
79	touchscreen@49 {
80		status = "disabled";
81	};
82};
83
84&i2c5 {	/* TP7/TP8 */
85	pinctrl-names = "default";
86	pinctrl-0 = <&i2c5_pins_a>;
87	i2c-scl-rising-time-ns = <185>;
88	i2c-scl-falling-time-ns = <20>;
89	status = "okay";
90	/* spare dmas for other usage */
91	/delete-property/dmas;
92	/delete-property/dma-names;
93};
94
95&sdmmc3 {
96	/*
97	 * On DRC02, the SoM does not have SDIO WiFi. The pins
98	 * are used for on-board microSD slot instead.
99	 */
100	/delete-property/broken-cd;
101	cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
102	disable-wp;
103};
104
105&spi1 {
106	pinctrl-names = "default";
107	pinctrl-0 = <&spi1_pins_a>;
108	cs-gpios = <&gpioz 3 0>;
109	/* Use PIO for the display */
110	/delete-property/dmas;
111	/delete-property/dma-names;
112	status = "disabled";	/* Enable once there is display driver */
113	/*
114	 * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are
115	 * also connected to the display board connector.
116	 */
117};
118
119&usart3 {
120	pinctrl-names = "default";
121	pinctrl-0 = <&usart3_pins_a>;
122	/delete-property/dmas;
123	/delete-property/dma-names;
124	status = "okay";
125};
126
127/*
128 * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
129 *       however the STM32MP1 pinmux cannot map them to UART4 .
130 */
131
132&uart8 {	/* RS485 */
133	linux,rs485-enabled-at-boot-time;
134	pinctrl-names = "default";
135	pinctrl-0 = <&uart8_pins_a>;
136	rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>;
137	/delete-property/dmas;
138	/delete-property/dma-names;
139	status = "okay";
140};
141
142&usbh_ehci {
143	phys = <&usbphyc_port0>;
144	status = "okay";
145};
146
147&usbphyc {
148	status = "okay";
149};
150
151&usbphyc_port0 {
152	phy-supply = <&vdd_usb>;
153};
154
155&usbphyc_port1 {
156	phy-supply = <&vdd_usb>;
157};
158