xref: /openbmc/qemu/target/mips/tcg/octeon.decode (revision 0e8b3010)
1# Octeon Architecture Module instruction set
2#
3# Copyright (C) 2022 Pavel Dovgalyuk
4#
5# SPDX-License-Identifier: LGPL-2.1-or-later
6#
7
8# Branch on bit set or clear
9# BBIT0      110010 ..... ..... ................
10# BBIT032    110110 ..... ..... ................
11# BBIT1      111010 ..... ..... ................
12# BBIT132    111110 ..... ..... ................
13
14%bbit_p      28:1 16:5
15BBIT         11 set:1 . 10 rs:5 ..... offset:s16 p=%bbit_p
16
17# Arithmetic
18# BADDU rd, rs, rt
19# DMUL rd, rs, rt
20# EXTS rt, rs, p, lenm1
21# EXTS32 rt, rs, p, lenm1
22# CINS rt, rs, p, lenm1
23# CINS32 rt, rs, p, lenm1
24# DPOP rd, rs
25# POP rd, rs
26# SEQ rd, rs, rt
27# SEQI rt, rs, immediate
28# SNE rd, rs, rt
29# SNEI rt, rs, immediate
30
31@r3          ...... rs:5 rt:5 rd:5 ..... ......
32%bitfield_p  0:1 6:5
33@bitfield    ...... rs:5 rt:5 lenm1:5 ..... ..... . p=%bitfield_p
34
35BADDU        011100 ..... ..... ..... 00000 101000 @r3
36DMUL         011100 ..... ..... ..... 00000 000011 @r3
37EXTS         011100 ..... ..... ..... ..... 11101 . @bitfield
38CINS         011100 ..... ..... ..... ..... 11001 . @bitfield
39POP          011100 rs:5 00000 rd:5 00000 10110 dw:1
40SEQNE        011100 rs:5 rt:5 rd:5 00000 10101 ne:1
41SEQNEI       011100 rs:5 rt:5 imm:s10 10111 ne:1
42