1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2015 Freescale Semiconductor, Inc.
4  */
5 
6 #ifndef __ASM_ARCH_MX6SL_DDR_H__
7 #define __ASM_ARCH_MX6SL_DDR_H__
8 
9 #ifndef CONFIG_MX6SL
10 #error "wrong CPU"
11 #endif
12 
13 #define MX6_IOM_DRAM_CAS_B	0x020e0300
14 #define MX6_IOM_DRAM_CS0_B	0x020e0304
15 #define MX6_IOM_DRAM_CS1_B	0x020e0308
16 
17 #define MX6_IOM_DRAM_DQM0	0x020e030c
18 #define MX6_IOM_DRAM_DQM1	0x020e0310
19 #define MX6_IOM_DRAM_DQM2	0x020e0314
20 #define MX6_IOM_DRAM_DQM3	0x020e0318
21 
22 #define MX6_IOM_DRAM_RAS_B	0x020e031c
23 #define MX6_IOM_DRAM_RESET	0x020e0320
24 
25 #define MX6_IOM_DRAM_SDBA0	0x020e0324
26 #define MX6_IOM_DRAM_SDBA1	0x020e0328
27 #define MX6_IOM_DRAM_SDBA2	0x020e032c
28 
29 #define MX6_IOM_DRAM_SDCKE0	0x020e0330
30 #define MX6_IOM_DRAM_SDCKE1	0x020e0334
31 
32 #define MX6_IOM_DRAM_SDCLK0_P	0x020e0338
33 
34 #define MX6_IOM_DRAM_ODT0	0x020e033c
35 #define MX6_IOM_DRAM_ODT1	0x020e0340
36 
37 #define MX6_IOM_DRAM_SDQS0_P	0x020e0344
38 #define MX6_IOM_DRAM_SDQS1_P	0x020e0348
39 #define MX6_IOM_DRAM_SDQS2_P	0x020e034c
40 #define MX6_IOM_DRAM_SDQS3_P	0x020e0350
41 
42 #define MX6_IOM_DRAM_SDWE_B	0x020e0354
43 
44 #endif /*__ASM_ARCH_MX6SL_DDR_H__ */
45