1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2021 MediaTek Inc. 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/spmi/spmi.h> 8#include "mt8195.dtsi" 9#include "mt6359.dtsi" 10 11/ { 12 aliases { 13 i2c0 = &i2c0; 14 i2c1 = &i2c1; 15 i2c2 = &i2c2; 16 i2c3 = &i2c3; 17 i2c4 = &i2c4; 18 i2c5 = &i2c5; 19 i2c7 = &i2c7; 20 mmc0 = &mmc0; 21 mmc1 = &mmc1; 22 serial0 = &uart0; 23 }; 24 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; 31 pwms = <&disp_pwm0 0 500000>; 32 power-supply = <&ppvar_sys>; 33 }; 34 35 chosen { 36 stdout-path = "serial0:115200n8"; 37 }; 38 39 dmic-codec { 40 compatible = "dmic-codec"; 41 num-channels = <2>; 42 wakeup-delay-ms = <50>; 43 }; 44 45 memory@40000000 { 46 device_type = "memory"; 47 reg = <0 0x40000000 0 0x80000000>; 48 }; 49 50 /* system wide LDO 3.3V power rail */ 51 pp3300_z5: regulator-pp3300-ldo-z5 { 52 compatible = "regulator-fixed"; 53 regulator-name = "pp3300_ldo_z5"; 54 regulator-always-on; 55 regulator-boot-on; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 58 vin-supply = <&ppvar_sys>; 59 }; 60 61 /* separately switched 3.3V power rail */ 62 pp3300_s3: regulator-pp3300-s3 { 63 compatible = "regulator-fixed"; 64 regulator-name = "pp3300_s3"; 65 /* automatically sequenced by PMIC EXT_PMIC_EN2 */ 66 regulator-always-on; 67 regulator-boot-on; 68 regulator-min-microvolt = <3300000>; 69 regulator-max-microvolt = <3300000>; 70 vin-supply = <&pp3300_z2>; 71 }; 72 73 /* system wide 3.3V power rail */ 74 pp3300_z2: regulator-pp3300-z2 { 75 compatible = "regulator-fixed"; 76 regulator-name = "pp3300_z2"; 77 /* EN pin tied to pp4200_z2, which is controlled by EC */ 78 regulator-always-on; 79 regulator-boot-on; 80 regulator-min-microvolt = <3300000>; 81 regulator-max-microvolt = <3300000>; 82 vin-supply = <&ppvar_sys>; 83 }; 84 85 /* system wide 4.2V power rail */ 86 pp4200_z2: regulator-pp4200-z2 { 87 compatible = "regulator-fixed"; 88 regulator-name = "pp4200_z2"; 89 /* controlled by EC */ 90 regulator-always-on; 91 regulator-boot-on; 92 regulator-min-microvolt = <4200000>; 93 regulator-max-microvolt = <4200000>; 94 vin-supply = <&ppvar_sys>; 95 }; 96 97 /* system wide switching 5.0V power rail */ 98 pp5000_s5: regulator-pp5000-s5 { 99 compatible = "regulator-fixed"; 100 regulator-name = "pp5000_s5"; 101 /* controlled by EC */ 102 regulator-always-on; 103 regulator-boot-on; 104 regulator-min-microvolt = <5000000>; 105 regulator-max-microvolt = <5000000>; 106 vin-supply = <&ppvar_sys>; 107 }; 108 109 /* system wide semi-regulated power rail from battery or USB */ 110 ppvar_sys: regulator-ppvar-sys { 111 compatible = "regulator-fixed"; 112 regulator-name = "ppvar_sys"; 113 regulator-always-on; 114 regulator-boot-on; 115 }; 116 117 /* Murata NCP03WF104F05RL */ 118 tboard_thermistor1: thermal-sensor-t1 { 119 compatible = "generic-adc-thermal"; 120 #thermal-sensor-cells = <0>; 121 io-channels = <&auxadc 0>; 122 io-channel-names = "sensor-channel"; 123 temperature-lookup-table = < (-10000) 1553 124 (-5000) 1485 125 0 1406 126 5000 1317 127 10000 1219 128 15000 1115 129 20000 1007 130 25000 900 131 30000 796 132 35000 697 133 40000 605 134 45000 523 135 50000 449 136 55000 384 137 60000 327 138 65000 279 139 70000 237 140 75000 202 141 80000 172 142 85000 147 143 90000 125 144 95000 107 145 100000 92 146 105000 79 147 110000 68 148 115000 59 149 120000 51 150 125000 44>; 151 }; 152 153 tboard_thermistor2: thermal-sensor-t2 { 154 compatible = "generic-adc-thermal"; 155 #thermal-sensor-cells = <0>; 156 io-channels = <&auxadc 1>; 157 io-channel-names = "sensor-channel"; 158 temperature-lookup-table = < (-10000) 1553 159 (-5000) 1485 160 0 1406 161 5000 1317 162 10000 1219 163 15000 1115 164 20000 1007 165 25000 900 166 30000 796 167 35000 697 168 40000 605 169 45000 523 170 50000 449 171 55000 384 172 60000 327 173 65000 279 174 70000 237 175 75000 202 176 80000 172 177 85000 147 178 90000 125 179 95000 107 180 100000 92 181 105000 79 182 110000 68 183 115000 59 184 120000 51 185 125000 44>; 186 }; 187 188 usb_vbus: regulator-5v0-usb-vbus { 189 compatible = "regulator-fixed"; 190 regulator-name = "usb-vbus"; 191 regulator-min-microvolt = <5000000>; 192 regulator-max-microvolt = <5000000>; 193 enable-active-high; 194 regulator-always-on; 195 }; 196 197 reserved_memory: reserved-memory { 198 #address-cells = <2>; 199 #size-cells = <2>; 200 ranges; 201 202 scp_mem: memory@50000000 { 203 compatible = "shared-dma-pool"; 204 reg = <0 0x50000000 0 0x2900000>; 205 no-map; 206 }; 207 208 adsp_mem: memory@60000000 { 209 compatible = "shared-dma-pool"; 210 reg = <0 0x60000000 0 0xd80000>; 211 no-map; 212 }; 213 214 afe_mem: memory@60d80000 { 215 compatible = "shared-dma-pool"; 216 reg = <0 0x60d80000 0 0x100000>; 217 no-map; 218 }; 219 220 adsp_device_mem: memory@60e80000 { 221 compatible = "shared-dma-pool"; 222 reg = <0 0x60e80000 0 0x280000>; 223 no-map; 224 }; 225 }; 226 227 spk_amplifier: rt1019p { 228 compatible = "realtek,rt1019p"; 229 label = "rt1019p"; 230 pinctrl-names = "default"; 231 pinctrl-0 = <&rt1019p_pins_default>; 232 sdb-gpios = <&pio 100 GPIO_ACTIVE_HIGH>; 233 }; 234}; 235 236&adsp { 237 status = "okay"; 238 239 memory-region = <&adsp_device_mem>, <&adsp_mem>; 240}; 241 242&afe { 243 status = "okay"; 244 245 mediatek,etdm-in2-cowork-source = <2>; 246 mediatek,etdm-out2-cowork-source = <0>; 247 memory-region = <&afe_mem>; 248}; 249 250&auxadc { 251 status = "okay"; 252}; 253 254&cpu0 { 255 cpu-supply = <&mt6359_vcore_buck_reg>; 256}; 257 258&cpu1 { 259 cpu-supply = <&mt6359_vcore_buck_reg>; 260}; 261 262&cpu2 { 263 cpu-supply = <&mt6359_vcore_buck_reg>; 264}; 265 266&cpu3 { 267 cpu-supply = <&mt6359_vcore_buck_reg>; 268}; 269 270&cpu4 { 271 cpu-supply = <&mt6315_6_vbuck1>; 272}; 273 274&cpu5 { 275 cpu-supply = <&mt6315_6_vbuck1>; 276}; 277 278&cpu6 { 279 cpu-supply = <&mt6315_6_vbuck1>; 280}; 281 282&cpu7 { 283 cpu-supply = <&mt6315_6_vbuck1>; 284}; 285 286&dp_intf0 { 287 status = "okay"; 288 289 port { 290 dp_intf0_out: endpoint { 291 remote-endpoint = <&edp_in>; 292 }; 293 }; 294}; 295 296&dp_intf1 { 297 status = "okay"; 298 299 port { 300 dp_intf1_out: endpoint { 301 remote-endpoint = <&dptx_in>; 302 }; 303 }; 304}; 305 306&edp_tx { 307 status = "okay"; 308 309 pinctrl-names = "default"; 310 pinctrl-0 = <&edptx_pins_default>; 311 312 ports { 313 #address-cells = <1>; 314 #size-cells = <0>; 315 316 port@0 { 317 reg = <0>; 318 edp_in: endpoint { 319 remote-endpoint = <&dp_intf0_out>; 320 }; 321 }; 322 323 port@1 { 324 reg = <1>; 325 edp_out: endpoint { 326 data-lanes = <0 1 2 3>; 327 }; 328 }; 329 }; 330}; 331 332&disp_pwm0 { 333 status = "okay"; 334 335 pinctrl-names = "default"; 336 pinctrl-0 = <&disp_pwm0_pin_default>; 337}; 338 339&dp_tx { 340 status = "okay"; 341 342 pinctrl-names = "default"; 343 pinctrl-0 = <&dptx_pin>; 344 345 ports { 346 #address-cells = <1>; 347 #size-cells = <0>; 348 349 port@0 { 350 reg = <0>; 351 dptx_in: endpoint { 352 remote-endpoint = <&dp_intf1_out>; 353 }; 354 }; 355 356 port@1 { 357 reg = <1>; 358 dptx_out: endpoint { 359 data-lanes = <0 1 2 3>; 360 }; 361 }; 362 }; 363}; 364 365&gic { 366 mediatek,broken-save-restore-fw; 367}; 368 369&gpu { 370 status = "okay"; 371 mali-supply = <&mt6315_7_vbuck1>; 372}; 373 374&i2c0 { 375 status = "okay"; 376 377 clock-frequency = <400000>; 378 pinctrl-names = "default"; 379 pinctrl-0 = <&i2c0_pins>; 380}; 381 382&i2c1 { 383 status = "okay"; 384 385 clock-frequency = <400000>; 386 i2c-scl-internal-delay-ns = <12500>; 387 pinctrl-names = "default"; 388 pinctrl-0 = <&i2c1_pins>; 389 390 trackpad@15 { 391 compatible = "elan,ekth3000"; 392 reg = <0x15>; 393 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>; 394 pinctrl-names = "default"; 395 pinctrl-0 = <&trackpad_pins>; 396 vcc-supply = <&pp3300_s3>; 397 wakeup-source; 398 }; 399}; 400 401&i2c2 { 402 status = "okay"; 403 404 clock-frequency = <400000>; 405 pinctrl-names = "default"; 406 pinctrl-0 = <&i2c2_pins>; 407 408 audio_codec: codec@1a { 409 /* Realtek RT5682i or RT5682s, sharing the same configuration */ 410 reg = <0x1a>; 411 interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>; 412 realtek,jd-src = <1>; 413 414 AVDD-supply = <&mt6359_vio18_ldo_reg>; 415 MICVDD-supply = <&pp3300_z2>; 416 VBAT-supply = <&pp3300_z5>; 417 }; 418}; 419 420&i2c3 { 421 status = "okay"; 422 423 clock-frequency = <400000>; 424 pinctrl-names = "default"; 425 pinctrl-0 = <&i2c3_pins>; 426 427 tpm@50 { 428 compatible = "google,cr50"; 429 reg = <0x50>; 430 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>; 431 pinctrl-names = "default"; 432 pinctrl-0 = <&cr50_int>; 433 }; 434}; 435 436&i2c4 { 437 status = "okay"; 438 439 clock-frequency = <400000>; 440 pinctrl-names = "default"; 441 pinctrl-0 = <&i2c4_pins>; 442 443 ts_10: touchscreen@10 { 444 compatible = "hid-over-i2c"; 445 reg = <0x10>; 446 hid-descr-addr = <0x0001>; 447 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>; 448 pinctrl-names = "default"; 449 pinctrl-0 = <&touchscreen_pins>; 450 post-power-on-delay-ms = <10>; 451 vdd-supply = <&pp3300_s3>; 452 status = "disabled"; 453 }; 454}; 455 456&i2c5 { 457 status = "okay"; 458 459 clock-frequency = <400000>; 460 pinctrl-names = "default"; 461 pinctrl-0 = <&i2c5_pins>; 462}; 463 464&i2c7 { 465 status = "okay"; 466 467 clock-frequency = <400000>; 468 pinctrl-names = "default"; 469 pinctrl-0 = <&i2c7_pins>; 470 471 pmic@34 { 472 #interrupt-cells = <2>; 473 compatible = "mediatek,mt6360"; 474 reg = <0x34>; 475 interrupt-controller; 476 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>; 477 interrupt-names = "IRQB"; 478 pinctrl-names = "default"; 479 pinctrl-0 = <&subpmic_default>; 480 wakeup-source; 481 }; 482}; 483 484&mmc0 { 485 status = "okay"; 486 487 bus-width = <8>; 488 cap-mmc-highspeed; 489 cap-mmc-hw-reset; 490 hs400-ds-delay = <0x14c11>; 491 max-frequency = <200000000>; 492 mmc-hs200-1_8v; 493 mmc-hs400-1_8v; 494 no-sdio; 495 no-sd; 496 non-removable; 497 pinctrl-names = "default", "state_uhs"; 498 pinctrl-0 = <&mmc0_pins_default>; 499 pinctrl-1 = <&mmc0_pins_uhs>; 500 vmmc-supply = <&mt6359_vemc_1_ldo_reg>; 501 vqmmc-supply = <&mt6359_vufs_ldo_reg>; 502}; 503 504&mmc1 { 505 status = "okay"; 506 507 bus-width = <4>; 508 cap-sd-highspeed; 509 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>; 510 max-frequency = <200000000>; 511 no-mmc; 512 no-sdio; 513 pinctrl-names = "default", "state_uhs"; 514 pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>; 515 pinctrl-1 = <&mmc1_pins_default>; 516 sd-uhs-sdr50; 517 sd-uhs-sdr104; 518 vmmc-supply = <&mt_pmic_vmch_ldo_reg>; 519 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>; 520}; 521 522&mt6359codec { 523 mediatek,dmic-mode = <1>; /* one-wire */ 524 mediatek,mic-type-0 = <2>; /* DMIC */ 525}; 526 527/* for CPU-L */ 528&mt6359_vcore_buck_reg { 529 regulator-always-on; 530}; 531 532/* for CORE */ 533&mt6359_vgpu11_buck_reg { 534 regulator-always-on; 535}; 536 537&mt6359_vgpu11_sshub_buck_reg { 538 regulator-always-on; 539 regulator-min-microvolt = <550000>; 540 regulator-max-microvolt = <550000>; 541}; 542 543/* for CORE SRAM */ 544&mt6359_vpu_buck_reg { 545 regulator-always-on; 546}; 547 548&mt6359_vrf12_ldo_reg { 549 regulator-always-on; 550}; 551 552/* for GPU SRAM */ 553&mt6359_vsram_others_ldo_reg { 554 regulator-always-on; 555 regulator-min-microvolt = <750000>; 556 regulator-max-microvolt = <750000>; 557}; 558 559&mt6359_vufs_ldo_reg { 560 regulator-always-on; 561}; 562 563&nor_flash { 564 status = "okay"; 565 566 pinctrl-names = "default"; 567 pinctrl-0 = <&nor_pins_default>; 568 569 flash@0 { 570 compatible = "jedec,spi-nor"; 571 reg = <0>; 572 spi-max-frequency = <52000000>; 573 spi-rx-bus-width = <2>; 574 spi-tx-bus-width = <2>; 575 }; 576}; 577 578&pcie1 { 579 status = "okay"; 580 581 pinctrl-names = "default"; 582 pinctrl-0 = <&pcie1_pins_default>; 583}; 584 585&pio { 586 mediatek,rsel-resistance-in-si-unit; 587 pinctrl-names = "default"; 588 pinctrl-0 = <&pio_default>; 589 590 /* 144 lines */ 591 gpio-line-names = 592 "I2S_SPKR_MCLK", 593 "I2S_SPKR_DATAIN", 594 "I2S_SPKR_LRCK", 595 "I2S_SPKR_BCLK", 596 "EC_AP_INT_ODL", 597 /* 598 * AP_FLASH_WP_L is crossystem ABI. Schematics 599 * call it AP_FLASH_WP_ODL. 600 */ 601 "AP_FLASH_WP_L", 602 "TCHPAD_INT_ODL", 603 "EDP_HPD_1V8", 604 "AP_I2C_CAM_SDA", 605 "AP_I2C_CAM_SCL", 606 "AP_I2C_TCHPAD_SDA_1V8", 607 "AP_I2C_TCHPAD_SCL_1V8", 608 "AP_I2C_AUD_SDA", 609 "AP_I2C_AUD_SCL", 610 "AP_I2C_TPM_SDA_1V8", 611 "AP_I2C_TPM_SCL_1V8", 612 "AP_I2C_TCHSCR_SDA_1V8", 613 "AP_I2C_TCHSCR_SCL_1V8", 614 "EC_AP_HPD_OD", 615 "", 616 "PCIE_NVME_RST_L", 617 "PCIE_NVME_CLKREQ_ODL", 618 "PCIE_RST_1V8_L", 619 "PCIE_CLKREQ_1V8_ODL", 620 "PCIE_WAKE_1V8_ODL", 621 "CLK_24M_CAM0", 622 "CAM1_SEN_EN", 623 "AP_I2C_PWR_SCL_1V8", 624 "AP_I2C_PWR_SDA_1V8", 625 "AP_I2C_MISC_SCL", 626 "AP_I2C_MISC_SDA", 627 "EN_PP5000_HDMI_X", 628 "AP_HDMITX_HTPLG", 629 "", 630 "AP_HDMITX_SCL_1V8", 631 "AP_HDMITX_SDA_1V8", 632 "AP_RTC_CLK32K", 633 "AP_EC_WATCHDOG_L", 634 "SRCLKENA0", 635 "SRCLKENA1", 636 "PWRAP_SPI0_CS_L", 637 "PWRAP_SPI0_CK", 638 "PWRAP_SPI0_MOSI", 639 "PWRAP_SPI0_MISO", 640 "SPMI_SCL", 641 "SPMI_SDA", 642 "", 643 "", 644 "", 645 "I2S_HP_DATAIN", 646 "I2S_HP_MCLK", 647 "I2S_HP_BCK", 648 "I2S_HP_LRCK", 649 "I2S_HP_DATAOUT", 650 "SD_CD_ODL", 651 "EN_PP3300_DISP_X", 652 "TCHSCR_RST_1V8_L", 653 "TCHSCR_REPORT_DISABLE", 654 "EN_PP3300_WLAN_X", 655 "BT_KILL_1V8_L", 656 "I2S_SPKR_DATAOUT", 657 "WIFI_KILL_1V8_L", 658 "BEEP_ON", 659 "SCP_I2C_SENSOR_SCL_1V8", 660 "SCP_I2C_SENSOR_SDA_1V8", 661 "", 662 "", 663 "", 664 "", 665 "AUD_CLK_MOSI", 666 "AUD_SYNC_MOSI", 667 "AUD_DAT_MOSI0", 668 "AUD_DAT_MOSI1", 669 "AUD_DAT_MISO0", 670 "AUD_DAT_MISO1", 671 "AUD_DAT_MISO2", 672 "SCP_VREQ_VAO", 673 "AP_SPI_GSC_TPM_CLK", 674 "AP_SPI_GSC_TPM_MOSI", 675 "AP_SPI_GSC_TPM_CS_L", 676 "AP_SPI_GSC_TPM_MISO", 677 "EN_PP1000_CAM_X", 678 "AP_EDP_BKLTEN", 679 "", 680 "USB3_HUB_RST_L", 681 "", 682 "WLAN_ALERT_ODL", 683 "EC_IN_RW_ODL", 684 "GSC_AP_INT_ODL", 685 "HP_INT_ODL", 686 "CAM0_RST_L", 687 "CAM1_RST_L", 688 "TCHSCR_INT_1V8_L", 689 "CAM1_DET_L", 690 "RST_ALC1011_L", 691 "", 692 "", 693 "BL_PWM_1V8", 694 "UART_AP_TX_DBG_RX", 695 "UART_DBG_TX_AP_RX", 696 "EN_SPKR", 697 "AP_EC_WARM_RST_REQ", 698 "UART_SCP_TX_DBGCON_RX", 699 "UART_DBGCON_TX_SCP_RX", 700 "", 701 "", 702 "KPCOL0", 703 "", 704 "MT6315_GPU_INT", 705 "MT6315_PROC_BC_INT", 706 "SD_CMD", 707 "SD_CLK", 708 "SD_DAT0", 709 "SD_DAT1", 710 "SD_DAT2", 711 "SD_DAT3", 712 "EMMC_DAT7", 713 "EMMC_DAT6", 714 "EMMC_DAT5", 715 "EMMC_DAT4", 716 "EMMC_RSTB", 717 "EMMC_CMD", 718 "EMMC_CLK", 719 "EMMC_DAT3", 720 "EMMC_DAT2", 721 "EMMC_DAT1", 722 "EMMC_DAT0", 723 "EMMC_DSL", 724 "", 725 "", 726 "MT6360_INT_ODL", 727 "SCP_JTAG0_TRSTN", 728 "AP_SPI_EC_CS_L", 729 "AP_SPI_EC_CLK", 730 "AP_SPI_EC_MOSI", 731 "AP_SPI_EC_MISO", 732 "SCP_JTAG0_TMS", 733 "SCP_JTAG0_TCK", 734 "SCP_JTAG0_TDO", 735 "SCP_JTAG0_TDI", 736 "AP_SPI_FLASH_CS_L", 737 "AP_SPI_FLASH_CLK", 738 "AP_SPI_FLASH_MOSI", 739 "AP_SPI_FLASH_MISO"; 740 741 aud_pins_default: audio-default-pins { 742 pins-cmd-dat { 743 pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>, 744 <PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>, 745 <PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>, 746 <PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>, 747 <PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>, 748 <PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>, 749 <PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>, 750 <PINMUX_GPIO0__FUNC_TDMIN_MCK>, 751 <PINMUX_GPIO1__FUNC_TDMIN_DI>, 752 <PINMUX_GPIO2__FUNC_TDMIN_LRCK>, 753 <PINMUX_GPIO3__FUNC_TDMIN_BCK>, 754 <PINMUX_GPIO60__FUNC_I2SO2_D0>, 755 <PINMUX_GPIO49__FUNC_I2SIN_D0>, 756 <PINMUX_GPIO50__FUNC_I2SO1_MCK>, 757 <PINMUX_GPIO51__FUNC_I2SO1_BCK>, 758 <PINMUX_GPIO52__FUNC_I2SO1_WS>, 759 <PINMUX_GPIO53__FUNC_I2SO1_D0>; 760 }; 761 762 pins-hp-jack-int-odl { 763 pinmux = <PINMUX_GPIO89__FUNC_GPIO89>; 764 input-enable; 765 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 766 }; 767 }; 768 769 cr50_int: cr50-irq-default-pins { 770 pins-gsc-ap-int-odl { 771 pinmux = <PINMUX_GPIO88__FUNC_GPIO88>; 772 input-enable; 773 }; 774 }; 775 776 cros_ec_int: cros-ec-irq-default-pins { 777 pins-ec-ap-int-odl { 778 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>; 779 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 780 input-enable; 781 }; 782 }; 783 784 edptx_pins_default: edptx-default-pins { 785 pins-cmd-dat { 786 pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>; 787 bias-pull-up; 788 }; 789 }; 790 791 disp_pwm0_pin_default: disp-pwm0-default-pins { 792 pins-disp-pwm { 793 pinmux = <PINMUX_GPIO82__FUNC_GPIO82>, 794 <PINMUX_GPIO97__FUNC_DISP_PWM0>; 795 }; 796 }; 797 798 dptx_pin: dptx-default-pins { 799 pins-cmd-dat { 800 pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>; 801 bias-pull-up; 802 }; 803 }; 804 805 i2c0_pins: i2c0-default-pins { 806 pins-bus { 807 pinmux = <PINMUX_GPIO8__FUNC_SDA0>, 808 <PINMUX_GPIO9__FUNC_SCL0>; 809 bias-disable; 810 drive-strength-microamp = <1000>; 811 }; 812 }; 813 814 i2c1_pins: i2c1-default-pins { 815 pins-bus { 816 pinmux = <PINMUX_GPIO10__FUNC_SDA1>, 817 <PINMUX_GPIO11__FUNC_SCL1>; 818 bias-pull-up = <1000>; 819 drive-strength-microamp = <1000>; 820 }; 821 }; 822 823 i2c2_pins: i2c2-default-pins { 824 pins-bus { 825 pinmux = <PINMUX_GPIO12__FUNC_SDA2>, 826 <PINMUX_GPIO13__FUNC_SCL2>; 827 bias-disable; 828 drive-strength-microamp = <1000>; 829 }; 830 }; 831 832 i2c3_pins: i2c3-default-pins { 833 pins-bus { 834 pinmux = <PINMUX_GPIO14__FUNC_SDA3>, 835 <PINMUX_GPIO15__FUNC_SCL3>; 836 bias-pull-up = <1000>; 837 drive-strength-microamp = <1000>; 838 }; 839 }; 840 841 i2c4_pins: i2c4-default-pins { 842 pins-bus { 843 pinmux = <PINMUX_GPIO16__FUNC_SDA4>, 844 <PINMUX_GPIO17__FUNC_SCL4>; 845 bias-pull-up = <1000>; 846 drive-strength = <4>; 847 }; 848 }; 849 850 i2c5_pins: i2c5-default-pins { 851 pins-bus { 852 pinmux = <PINMUX_GPIO29__FUNC_SCL5>, 853 <PINMUX_GPIO30__FUNC_SDA5>; 854 bias-disable; 855 drive-strength-microamp = <1000>; 856 }; 857 }; 858 859 i2c7_pins: i2c7-default-pins { 860 pins-bus { 861 pinmux = <PINMUX_GPIO27__FUNC_SCL7>, 862 <PINMUX_GPIO28__FUNC_SDA7>; 863 bias-disable; 864 }; 865 }; 866 867 mmc0_pins_default: mmc0-default-pins { 868 pins-cmd-dat { 869 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>, 870 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>, 871 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>, 872 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>, 873 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>, 874 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>, 875 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>, 876 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>, 877 <PINMUX_GPIO121__FUNC_MSDC0_CMD>; 878 input-enable; 879 drive-strength = <6>; 880 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 881 }; 882 883 pins-clk { 884 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>; 885 drive-strength = <6>; 886 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 887 }; 888 889 pins-rst { 890 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>; 891 drive-strength = <6>; 892 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 893 }; 894 }; 895 896 mmc0_pins_uhs: mmc0-uhs-pins { 897 pins-cmd-dat { 898 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>, 899 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>, 900 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>, 901 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>, 902 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>, 903 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>, 904 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>, 905 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>, 906 <PINMUX_GPIO121__FUNC_MSDC0_CMD>; 907 input-enable; 908 drive-strength = <8>; 909 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 910 }; 911 912 pins-clk { 913 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>; 914 drive-strength = <8>; 915 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 916 }; 917 918 pins-ds { 919 pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>; 920 drive-strength = <8>; 921 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 922 }; 923 924 pins-rst { 925 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>; 926 drive-strength = <8>; 927 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 928 }; 929 }; 930 931 mmc1_pins_detect: mmc1-detect-pins { 932 pins-insert { 933 pinmux = <PINMUX_GPIO54__FUNC_GPIO54>; 934 bias-pull-up; 935 }; 936 }; 937 938 mmc1_pins_default: mmc1-default-pins { 939 pins-cmd-dat { 940 pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>, 941 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>, 942 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>, 943 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>, 944 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>; 945 input-enable; 946 drive-strength = <8>; 947 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 948 }; 949 950 pins-clk { 951 pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>; 952 drive-strength = <8>; 953 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 954 }; 955 }; 956 957 nor_pins_default: nor-default-pins { 958 pins-ck-io { 959 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>, 960 <PINMUX_GPIO141__FUNC_SPINOR_CK>, 961 <PINMUX_GPIO143__FUNC_SPINOR_IO1>; 962 drive-strength = <6>; 963 bias-pull-down; 964 }; 965 966 pins-cs { 967 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>; 968 drive-strength = <6>; 969 bias-pull-up; 970 }; 971 }; 972 973 pcie0_pins_default: pcie0-default-pins { 974 pins-bus { 975 pinmux = <PINMUX_GPIO19__FUNC_WAKEN>, 976 <PINMUX_GPIO20__FUNC_PERSTN>, 977 <PINMUX_GPIO21__FUNC_CLKREQN>; 978 bias-pull-up; 979 }; 980 }; 981 982 pcie1_pins_default: pcie1-default-pins { 983 pins-bus { 984 pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>, 985 <PINMUX_GPIO23__FUNC_CLKREQN_1>, 986 <PINMUX_GPIO24__FUNC_WAKEN_1>; 987 bias-pull-up; 988 }; 989 }; 990 991 pio_default: pio-default-pins { 992 pins-wifi-enable { 993 pinmux = <PINMUX_GPIO58__FUNC_GPIO58>; 994 output-high; 995 drive-strength = <14>; 996 }; 997 998 pins-low-power-pd { 999 pinmux = <PINMUX_GPIO25__FUNC_GPIO25>, 1000 <PINMUX_GPIO26__FUNC_GPIO26>, 1001 <PINMUX_GPIO46__FUNC_GPIO46>, 1002 <PINMUX_GPIO47__FUNC_GPIO47>, 1003 <PINMUX_GPIO48__FUNC_GPIO48>, 1004 <PINMUX_GPIO65__FUNC_GPIO65>, 1005 <PINMUX_GPIO66__FUNC_GPIO66>, 1006 <PINMUX_GPIO67__FUNC_GPIO67>, 1007 <PINMUX_GPIO68__FUNC_GPIO68>, 1008 <PINMUX_GPIO128__FUNC_GPIO128>, 1009 <PINMUX_GPIO129__FUNC_GPIO129>; 1010 input-enable; 1011 bias-pull-down; 1012 }; 1013 1014 pins-low-power-pupd { 1015 pinmux = <PINMUX_GPIO77__FUNC_GPIO77>, 1016 <PINMUX_GPIO78__FUNC_GPIO78>, 1017 <PINMUX_GPIO79__FUNC_GPIO79>, 1018 <PINMUX_GPIO80__FUNC_GPIO80>, 1019 <PINMUX_GPIO83__FUNC_GPIO83>, 1020 <PINMUX_GPIO85__FUNC_GPIO85>, 1021 <PINMUX_GPIO90__FUNC_GPIO90>, 1022 <PINMUX_GPIO91__FUNC_GPIO91>, 1023 <PINMUX_GPIO93__FUNC_GPIO93>, 1024 <PINMUX_GPIO94__FUNC_GPIO94>, 1025 <PINMUX_GPIO95__FUNC_GPIO95>, 1026 <PINMUX_GPIO96__FUNC_GPIO96>, 1027 <PINMUX_GPIO104__FUNC_GPIO104>, 1028 <PINMUX_GPIO105__FUNC_GPIO105>, 1029 <PINMUX_GPIO107__FUNC_GPIO107>; 1030 input-enable; 1031 bias-pull-down = <MTK_PUPD_SET_R1R0_01>; 1032 }; 1033 }; 1034 1035 rt1019p_pins_default: rt1019p-default-pins { 1036 pins-amp-sdb { 1037 pinmux = <PINMUX_GPIO100__FUNC_GPIO100>; 1038 output-low; 1039 }; 1040 }; 1041 1042 scp_pins: scp-default-pins { 1043 pins-vreq { 1044 pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>; 1045 bias-disable; 1046 input-enable; 1047 }; 1048 }; 1049 1050 spi0_pins: spi0-default-pins { 1051 pins-cs-mosi-clk { 1052 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>, 1053 <PINMUX_GPIO134__FUNC_SPIM0_MO>, 1054 <PINMUX_GPIO133__FUNC_SPIM0_CLK>; 1055 bias-disable; 1056 }; 1057 1058 pins-miso { 1059 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>; 1060 bias-pull-down; 1061 }; 1062 }; 1063 1064 subpmic_default: subpmic-default-pins { 1065 subpmic_pin_irq: pins-subpmic-int-n { 1066 pinmux = <PINMUX_GPIO130__FUNC_GPIO130>; 1067 input-enable; 1068 bias-pull-up; 1069 }; 1070 }; 1071 1072 trackpad_pins: trackpad-default-pins { 1073 pins-int-n { 1074 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>; 1075 input-enable; 1076 bias-pull-up; 1077 }; 1078 }; 1079 1080 touchscreen_pins: touchscreen-default-pins { 1081 pins-int-n { 1082 pinmux = <PINMUX_GPIO92__FUNC_GPIO92>; 1083 input-enable; 1084 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1085 }; 1086 pins-rst { 1087 pinmux = <PINMUX_GPIO56__FUNC_GPIO56>; 1088 output-high; 1089 }; 1090 pins-report-sw { 1091 pinmux = <PINMUX_GPIO57__FUNC_GPIO57>; 1092 output-low; 1093 }; 1094 }; 1095}; 1096 1097&pmic { 1098 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; 1099}; 1100 1101&scp { 1102 status = "okay"; 1103 1104 firmware-name = "mediatek/mt8195/scp.img"; 1105 memory-region = <&scp_mem>; 1106 pinctrl-names = "default"; 1107 pinctrl-0 = <&scp_pins>; 1108 1109 cros-ec-rpmsg { 1110 compatible = "google,cros-ec-rpmsg"; 1111 mediatek,rpmsg-name = "cros-ec-rpmsg"; 1112 }; 1113}; 1114 1115&sound { 1116 status = "okay"; 1117 1118 mediatek,adsp = <&adsp>; 1119 mediatek,dai-link = 1120 "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE", 1121 "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE", 1122 "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5"; 1123 pinctrl-names = "default"; 1124 pinctrl-0 = <&aud_pins_default>; 1125}; 1126 1127&spi0 { 1128 status = "okay"; 1129 1130 pinctrl-names = "default"; 1131 pinctrl-0 = <&spi0_pins>; 1132 mediatek,pad-select = <0>; 1133 1134 cros_ec: ec@0 { 1135 #address-cells = <1>; 1136 #size-cells = <0>; 1137 1138 compatible = "google,cros-ec-spi"; 1139 reg = <0>; 1140 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>; 1141 pinctrl-names = "default"; 1142 pinctrl-0 = <&cros_ec_int>; 1143 spi-max-frequency = <3000000>; 1144 1145 keyboard-backlight { 1146 compatible = "google,cros-kbd-led-backlight"; 1147 }; 1148 1149 i2c_tunnel: i2c-tunnel { 1150 compatible = "google,cros-ec-i2c-tunnel"; 1151 google,remote-bus = <0>; 1152 #address-cells = <1>; 1153 #size-cells = <0>; 1154 }; 1155 1156 mt_pmic_vmc_ldo_reg: regulator@0 { 1157 compatible = "google,cros-ec-regulator"; 1158 reg = <0>; 1159 regulator-name = "mt_pmic_vmc_ldo"; 1160 regulator-min-microvolt = <1200000>; 1161 regulator-max-microvolt = <3600000>; 1162 }; 1163 1164 mt_pmic_vmch_ldo_reg: regulator@1 { 1165 compatible = "google,cros-ec-regulator"; 1166 reg = <1>; 1167 regulator-name = "mt_pmic_vmch_ldo"; 1168 regulator-min-microvolt = <2700000>; 1169 regulator-max-microvolt = <3600000>; 1170 }; 1171 1172 typec { 1173 compatible = "google,cros-ec-typec"; 1174 #address-cells = <1>; 1175 #size-cells = <0>; 1176 1177 usb_c0: connector@0 { 1178 compatible = "usb-c-connector"; 1179 reg = <0>; 1180 power-role = "dual"; 1181 data-role = "host"; 1182 try-power-role = "source"; 1183 }; 1184 1185 usb_c1: connector@1 { 1186 compatible = "usb-c-connector"; 1187 reg = <1>; 1188 power-role = "dual"; 1189 data-role = "host"; 1190 try-power-role = "source"; 1191 }; 1192 }; 1193 }; 1194}; 1195 1196&spmi { 1197 #address-cells = <2>; 1198 #size-cells = <0>; 1199 1200 mt6315@6 { 1201 compatible = "mediatek,mt6315-regulator"; 1202 reg = <0x6 SPMI_USID>; 1203 1204 regulators { 1205 mt6315_6_vbuck1: vbuck1 { 1206 regulator-compatible = "vbuck1"; 1207 regulator-name = "Vbcpu"; 1208 regulator-min-microvolt = <400000>; 1209 regulator-max-microvolt = <1193750>; 1210 regulator-enable-ramp-delay = <256>; 1211 regulator-ramp-delay = <6250>; 1212 regulator-allowed-modes = <0 1 2>; 1213 regulator-always-on; 1214 }; 1215 }; 1216 }; 1217 1218 mt6315@7 { 1219 compatible = "mediatek,mt6315-regulator"; 1220 reg = <0x7 SPMI_USID>; 1221 1222 regulators { 1223 mt6315_7_vbuck1: vbuck1 { 1224 regulator-compatible = "vbuck1"; 1225 regulator-name = "Vgpu"; 1226 regulator-min-microvolt = <400000>; 1227 regulator-max-microvolt = <1193750>; 1228 regulator-enable-ramp-delay = <256>; 1229 regulator-ramp-delay = <6250>; 1230 regulator-allowed-modes = <0 1 2>; 1231 regulator-always-on; 1232 }; 1233 }; 1234 }; 1235}; 1236 1237&thermal_zones { 1238 soc-area-thermal { 1239 polling-delay = <1000>; 1240 polling-delay-passive = <250>; 1241 thermal-sensors = <&tboard_thermistor1>; 1242 1243 trips { 1244 trip-crit { 1245 temperature = <84000>; 1246 hysteresis = <1000>; 1247 type = "critical"; 1248 }; 1249 }; 1250 }; 1251 1252 pmic-area-thermal { 1253 polling-delay = <1000>; 1254 polling-delay-passive = <0>; 1255 thermal-sensors = <&tboard_thermistor2>; 1256 1257 trips { 1258 trip-crit { 1259 temperature = <84000>; 1260 hysteresis = <1000>; 1261 type = "critical"; 1262 }; 1263 }; 1264 }; 1265}; 1266 1267&u3phy0 { 1268 status = "okay"; 1269}; 1270 1271&u3phy1 { 1272 status = "okay"; 1273}; 1274 1275&u3phy2 { 1276 status = "okay"; 1277}; 1278 1279&u3phy3 { 1280 status = "okay"; 1281}; 1282 1283&uart0 { 1284 status = "okay"; 1285}; 1286 1287&xhci0 { 1288 status = "okay"; 1289 1290 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1291 vbus-supply = <&usb_vbus>; 1292}; 1293 1294&xhci1 { 1295 status = "okay"; 1296 1297 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1298 vbus-supply = <&usb_vbus>; 1299}; 1300 1301&xhci2 { 1302 status = "okay"; 1303 1304 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1305 vbus-supply = <&usb_vbus>; 1306}; 1307 1308&xhci3 { 1309 status = "okay"; 1310 1311 /* MT7921's USB Bluetooth has issues with USB2 LPM */ 1312 usb2-lpm-disable; 1313 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1314 vbus-supply = <&usb_vbus>; 1315}; 1316 1317#include <arm/cros-ec-keyboard.dtsi> 1318#include <arm/cros-ec-sbs.dtsi> 1319 1320&keyboard_controller { 1321 function-row-physmap = < 1322 MATRIX_KEY(0x00, 0x02, 0) /* T1 */ 1323 MATRIX_KEY(0x03, 0x02, 0) /* T2 */ 1324 MATRIX_KEY(0x02, 0x02, 0) /* T3 */ 1325 MATRIX_KEY(0x01, 0x02, 0) /* T4 */ 1326 MATRIX_KEY(0x03, 0x04, 0) /* T5 */ 1327 MATRIX_KEY(0x02, 0x04, 0) /* T6 */ 1328 MATRIX_KEY(0x01, 0x04, 0) /* T7 */ 1329 MATRIX_KEY(0x02, 0x09, 0) /* T8 */ 1330 MATRIX_KEY(0x01, 0x09, 0) /* T9 */ 1331 MATRIX_KEY(0x00, 0x04, 0) /* T10 */ 1332 >; 1333 1334 linux,keymap = < 1335 MATRIX_KEY(0x00, 0x02, KEY_BACK) 1336 MATRIX_KEY(0x03, 0x02, KEY_REFRESH) 1337 MATRIX_KEY(0x02, 0x02, KEY_ZOOM) 1338 MATRIX_KEY(0x01, 0x02, KEY_SCALE) 1339 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) 1340 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) 1341 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) 1342 MATRIX_KEY(0x02, 0x09, KEY_MUTE) 1343 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) 1344 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) 1345 1346 CROS_STD_MAIN_KEYMAP 1347 >; 1348}; 1349