1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2 /*
3  * Microsemi Ocelot Switch driver
4  *
5  * Copyright (c) 2018 Microsemi Corporation
6  */
7 
8 #ifndef _MSCC_LUTON_MIIM_REGS_H_
9 #define _MSCC_LUTON_MIIM_REGS_H_
10 
11 #define MIIM_MII_STATUS(gi) (0xa0 + (gi * 36))
12 #define MIIM_MII_CMD(gi)    (0xa8 + (gi * 36))
13 #define MIIM_MII_DATA(gi)   (0xac + (gi * 36))
14 
15 #define MSCC_F_MII_STATUS_MIIM_STAT_BUSY(x)   (x ? BIT(3) : 0)
16 
17 #define MSCC_F_MII_CMD_MIIM_CMD_VLD(x)        (x ? BIT(31) : 0)
18 #define MSCC_F_MII_CMD_MIIM_CMD_PHYAD(x)      (GENMASK(29, 25) & (x << 25))
19 #define MSCC_F_MII_CMD_MIIM_CMD_REGAD(x)      (GENMASK(24, 20) & (x << 20))
20 #define MSCC_F_MII_CMD_MIIM_CMD_WRDATA(x)     (GENMASK(19, 4) & (x << 4))
21 #define MSCC_F_MII_CMD_MIIM_CMD_OPR_FIELD(x)  (GENMASK(2, 1) & (x << 1))
22 
23 #define MSCC_M_MII_DATA_MIIM_DATA_SUCCESS     GENMASK(17, 16)
24 #define MSCC_X_MII_DATA_MIIM_DATA_RDDATA(x)   ((x >> 0) & GENMASK(15, 0))
25 
26 #endif
27