1 /* This is the Linux kernel elf-loading code, ported into user space */
2 #include "qemu/osdep.h"
3 #include <sys/param.h>
4
5 #include <sys/prctl.h>
6 #include <sys/resource.h>
7 #include <sys/shm.h>
8
9 #include "qemu.h"
10 #include "user/tswap-target.h"
11 #include "user/page-protection.h"
12 #include "exec/page-protection.h"
13 #include "exec/mmap-lock.h"
14 #include "exec/translation-block.h"
15 #include "exec/tswap.h"
16 #include "user/guest-base.h"
17 #include "user-internals.h"
18 #include "signal-common.h"
19 #include "loader.h"
20 #include "user-mmap.h"
21 #include "disas/disas.h"
22 #include "qemu/bitops.h"
23 #include "qemu/path.h"
24 #include "qemu/queue.h"
25 #include "qemu/guest-random.h"
26 #include "qemu/units.h"
27 #include "qemu/selfmap.h"
28 #include "qemu/lockable.h"
29 #include "qapi/error.h"
30 #include "qemu/error-report.h"
31 #include "target_signal.h"
32 #include "tcg/debuginfo.h"
33
34 #ifdef TARGET_ARM
35 #include "target/arm/cpu-features.h"
36 #endif
37
38 #ifdef _ARCH_PPC64
39 #undef ARCH_DLINFO
40 #undef ELF_PLATFORM
41 #undef ELF_HWCAP
42 #undef ELF_HWCAP2
43 #undef ELF_CLASS
44 #undef ELF_DATA
45 #undef ELF_ARCH
46 #endif
47
48 #ifndef TARGET_ARCH_HAS_SIGTRAMP_PAGE
49 #define TARGET_ARCH_HAS_SIGTRAMP_PAGE 0
50 #endif
51
52 typedef struct {
53 const uint8_t *image;
54 const uint32_t *relocs;
55 unsigned image_size;
56 unsigned reloc_count;
57 unsigned sigreturn_ofs;
58 unsigned rt_sigreturn_ofs;
59 } VdsoImageInfo;
60
61 #define ELF_OSABI ELFOSABI_SYSV
62
63 /* from personality.h */
64
65 /*
66 * Flags for bug emulation.
67 *
68 * These occupy the top three bytes.
69 */
70 enum {
71 ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization of VA space */
72 FDPIC_FUNCPTRS = 0x0080000, /* userspace function ptrs point to
73 descriptors (signal handling) */
74 MMAP_PAGE_ZERO = 0x0100000,
75 ADDR_COMPAT_LAYOUT = 0x0200000,
76 READ_IMPLIES_EXEC = 0x0400000,
77 ADDR_LIMIT_32BIT = 0x0800000,
78 SHORT_INODE = 0x1000000,
79 WHOLE_SECONDS = 0x2000000,
80 STICKY_TIMEOUTS = 0x4000000,
81 ADDR_LIMIT_3GB = 0x8000000,
82 };
83
84 /*
85 * Personality types.
86 *
87 * These go in the low byte. Avoid using the top bit, it will
88 * conflict with error returns.
89 */
90 enum {
91 PER_LINUX = 0x0000,
92 PER_LINUX_32BIT = 0x0000 | ADDR_LIMIT_32BIT,
93 PER_LINUX_FDPIC = 0x0000 | FDPIC_FUNCPTRS,
94 PER_SVR4 = 0x0001 | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
95 PER_SVR3 = 0x0002 | STICKY_TIMEOUTS | SHORT_INODE,
96 PER_SCOSVR3 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS | SHORT_INODE,
97 PER_OSR5 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS,
98 PER_WYSEV386 = 0x0004 | STICKY_TIMEOUTS | SHORT_INODE,
99 PER_ISCR4 = 0x0005 | STICKY_TIMEOUTS,
100 PER_BSD = 0x0006,
101 PER_SUNOS = 0x0006 | STICKY_TIMEOUTS,
102 PER_XENIX = 0x0007 | STICKY_TIMEOUTS | SHORT_INODE,
103 PER_LINUX32 = 0x0008,
104 PER_LINUX32_3GB = 0x0008 | ADDR_LIMIT_3GB,
105 PER_IRIX32 = 0x0009 | STICKY_TIMEOUTS,/* IRIX5 32-bit */
106 PER_IRIXN32 = 0x000a | STICKY_TIMEOUTS,/* IRIX6 new 32-bit */
107 PER_IRIX64 = 0x000b | STICKY_TIMEOUTS,/* IRIX6 64-bit */
108 PER_RISCOS = 0x000c,
109 PER_SOLARIS = 0x000d | STICKY_TIMEOUTS,
110 PER_UW7 = 0x000e | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
111 PER_OSF4 = 0x000f, /* OSF/1 v4 */
112 PER_HPUX = 0x0010,
113 PER_MASK = 0x00ff,
114 };
115
116 /*
117 * Return the base personality without flags.
118 */
119 #define personality(pers) (pers & PER_MASK)
120
info_is_fdpic(struct image_info * info)121 int info_is_fdpic(struct image_info *info)
122 {
123 return info->personality == PER_LINUX_FDPIC;
124 }
125
126 /* this flag is uneffective under linux too, should be deleted */
127 #ifndef MAP_DENYWRITE
128 #define MAP_DENYWRITE 0
129 #endif
130
131 /* should probably go in elf.h */
132 #ifndef ELIBBAD
133 #define ELIBBAD 80
134 #endif
135
136 #if TARGET_BIG_ENDIAN
137 #define ELF_DATA ELFDATA2MSB
138 #else
139 #define ELF_DATA ELFDATA2LSB
140 #endif
141
142 #ifdef TARGET_ABI_MIPSN32
143 typedef abi_ullong target_elf_greg_t;
144 #define tswapreg(ptr) tswap64(ptr)
145 #else
146 typedef abi_ulong target_elf_greg_t;
147 #define tswapreg(ptr) tswapal(ptr)
148 #endif
149
150 #ifdef USE_UID16
151 typedef abi_ushort target_uid_t;
152 typedef abi_ushort target_gid_t;
153 #else
154 typedef abi_uint target_uid_t;
155 typedef abi_uint target_gid_t;
156 #endif
157 typedef abi_int target_pid_t;
158
159 #ifdef TARGET_I386
160
161 #define ELF_HWCAP get_elf_hwcap()
162
get_elf_hwcap(void)163 static uint32_t get_elf_hwcap(void)
164 {
165 X86CPU *cpu = X86_CPU(thread_cpu);
166
167 return cpu->env.features[FEAT_1_EDX];
168 }
169
170 #ifdef TARGET_X86_64
171 #define ELF_CLASS ELFCLASS64
172 #define ELF_ARCH EM_X86_64
173
174 #define ELF_PLATFORM "x86_64"
175
init_thread(struct target_pt_regs * regs,struct image_info * infop)176 static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
177 {
178 regs->rax = 0;
179 regs->rsp = infop->start_stack;
180 regs->rip = infop->entry;
181 }
182
183 #define ELF_NREG 27
184 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
185
186 /*
187 * Note that ELF_NREG should be 29 as there should be place for
188 * TRAPNO and ERR "registers" as well but linux doesn't dump
189 * those.
190 *
191 * See linux kernel: arch/x86/include/asm/elf.h
192 */
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUX86State * env)193 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *env)
194 {
195 (*regs)[0] = tswapreg(env->regs[15]);
196 (*regs)[1] = tswapreg(env->regs[14]);
197 (*regs)[2] = tswapreg(env->regs[13]);
198 (*regs)[3] = tswapreg(env->regs[12]);
199 (*regs)[4] = tswapreg(env->regs[R_EBP]);
200 (*regs)[5] = tswapreg(env->regs[R_EBX]);
201 (*regs)[6] = tswapreg(env->regs[11]);
202 (*regs)[7] = tswapreg(env->regs[10]);
203 (*regs)[8] = tswapreg(env->regs[9]);
204 (*regs)[9] = tswapreg(env->regs[8]);
205 (*regs)[10] = tswapreg(env->regs[R_EAX]);
206 (*regs)[11] = tswapreg(env->regs[R_ECX]);
207 (*regs)[12] = tswapreg(env->regs[R_EDX]);
208 (*regs)[13] = tswapreg(env->regs[R_ESI]);
209 (*regs)[14] = tswapreg(env->regs[R_EDI]);
210 (*regs)[15] = tswapreg(get_task_state(env_cpu_const(env))->orig_ax);
211 (*regs)[16] = tswapreg(env->eip);
212 (*regs)[17] = tswapreg(env->segs[R_CS].selector & 0xffff);
213 (*regs)[18] = tswapreg(env->eflags);
214 (*regs)[19] = tswapreg(env->regs[R_ESP]);
215 (*regs)[20] = tswapreg(env->segs[R_SS].selector & 0xffff);
216 (*regs)[21] = tswapreg(env->segs[R_FS].selector & 0xffff);
217 (*regs)[22] = tswapreg(env->segs[R_GS].selector & 0xffff);
218 (*regs)[23] = tswapreg(env->segs[R_DS].selector & 0xffff);
219 (*regs)[24] = tswapreg(env->segs[R_ES].selector & 0xffff);
220 (*regs)[25] = tswapreg(env->segs[R_FS].selector & 0xffff);
221 (*regs)[26] = tswapreg(env->segs[R_GS].selector & 0xffff);
222 }
223
224 #if ULONG_MAX > UINT32_MAX
225 #define INIT_GUEST_COMMPAGE
init_guest_commpage(void)226 static bool init_guest_commpage(void)
227 {
228 /*
229 * The vsyscall page is at a high negative address aka kernel space,
230 * which means that we cannot actually allocate it with target_mmap.
231 * We still should be able to use page_set_flags, unless the user
232 * has specified -R reserved_va, which would trigger an assert().
233 */
234 if (reserved_va != 0 &&
235 TARGET_VSYSCALL_PAGE + TARGET_PAGE_SIZE - 1 > reserved_va) {
236 error_report("Cannot allocate vsyscall page");
237 exit(EXIT_FAILURE);
238 }
239 page_set_flags(TARGET_VSYSCALL_PAGE,
240 TARGET_VSYSCALL_PAGE | ~TARGET_PAGE_MASK,
241 PAGE_EXEC | PAGE_VALID);
242 return true;
243 }
244 #endif
245 #else
246
247 /*
248 * This is used to ensure we don't load something for the wrong architecture.
249 */
250 #define elf_check_arch(x) ( ((x) == EM_386) || ((x) == EM_486) )
251
252 /*
253 * These are used to set parameters in the core dumps.
254 */
255 #define ELF_CLASS ELFCLASS32
256 #define ELF_ARCH EM_386
257
258 #define ELF_PLATFORM get_elf_platform()
259 #define EXSTACK_DEFAULT true
260
get_elf_platform(void)261 static const char *get_elf_platform(void)
262 {
263 static char elf_platform[] = "i386";
264 int family = object_property_get_int(OBJECT(thread_cpu), "family", NULL);
265 if (family > 6) {
266 family = 6;
267 }
268 if (family >= 3) {
269 elf_platform[1] = '0' + family;
270 }
271 return elf_platform;
272 }
273
init_thread(struct target_pt_regs * regs,struct image_info * infop)274 static inline void init_thread(struct target_pt_regs *regs,
275 struct image_info *infop)
276 {
277 regs->esp = infop->start_stack;
278 regs->eip = infop->entry;
279
280 /* SVR4/i386 ABI (pages 3-31, 3-32) says that when the program
281 starts %edx contains a pointer to a function which might be
282 registered using `atexit'. This provides a mean for the
283 dynamic linker to call DT_FINI functions for shared libraries
284 that have been loaded before the code runs.
285
286 A value of 0 tells we have no such handler. */
287 regs->edx = 0;
288 }
289
290 #define ELF_NREG 17
291 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
292
293 /*
294 * Note that ELF_NREG should be 19 as there should be place for
295 * TRAPNO and ERR "registers" as well but linux doesn't dump
296 * those.
297 *
298 * See linux kernel: arch/x86/include/asm/elf.h
299 */
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUX86State * env)300 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *env)
301 {
302 (*regs)[0] = tswapreg(env->regs[R_EBX]);
303 (*regs)[1] = tswapreg(env->regs[R_ECX]);
304 (*regs)[2] = tswapreg(env->regs[R_EDX]);
305 (*regs)[3] = tswapreg(env->regs[R_ESI]);
306 (*regs)[4] = tswapreg(env->regs[R_EDI]);
307 (*regs)[5] = tswapreg(env->regs[R_EBP]);
308 (*regs)[6] = tswapreg(env->regs[R_EAX]);
309 (*regs)[7] = tswapreg(env->segs[R_DS].selector & 0xffff);
310 (*regs)[8] = tswapreg(env->segs[R_ES].selector & 0xffff);
311 (*regs)[9] = tswapreg(env->segs[R_FS].selector & 0xffff);
312 (*regs)[10] = tswapreg(env->segs[R_GS].selector & 0xffff);
313 (*regs)[11] = tswapreg(get_task_state(env_cpu_const(env))->orig_ax);
314 (*regs)[12] = tswapreg(env->eip);
315 (*regs)[13] = tswapreg(env->segs[R_CS].selector & 0xffff);
316 (*regs)[14] = tswapreg(env->eflags);
317 (*regs)[15] = tswapreg(env->regs[R_ESP]);
318 (*regs)[16] = tswapreg(env->segs[R_SS].selector & 0xffff);
319 }
320
321 /*
322 * i386 is the only target which supplies AT_SYSINFO for the vdso.
323 * All others only supply AT_SYSINFO_EHDR.
324 */
325 #define DLINFO_ARCH_ITEMS (vdso_info != NULL)
326 #define ARCH_DLINFO \
327 do { \
328 if (vdso_info) { \
329 NEW_AUX_ENT(AT_SYSINFO, vdso_info->entry); \
330 } \
331 } while (0)
332
333 #endif /* TARGET_X86_64 */
334
335 #define VDSO_HEADER "vdso.c.inc"
336
337 #define USE_ELF_CORE_DUMP
338 #define ELF_EXEC_PAGESIZE 4096
339
340 #endif /* TARGET_I386 */
341
342 #ifdef TARGET_ARM
343
344 #ifndef TARGET_AARCH64
345 /* 32 bit ARM definitions */
346
347 #define ELF_ARCH EM_ARM
348 #define ELF_CLASS ELFCLASS32
349 #define EXSTACK_DEFAULT true
350
init_thread(struct target_pt_regs * regs,struct image_info * infop)351 static inline void init_thread(struct target_pt_regs *regs,
352 struct image_info *infop)
353 {
354 abi_long stack = infop->start_stack;
355 memset(regs, 0, sizeof(*regs));
356
357 regs->uregs[16] = ARM_CPU_MODE_USR;
358 if (infop->entry & 1) {
359 regs->uregs[16] |= CPSR_T;
360 }
361 regs->uregs[15] = infop->entry & 0xfffffffe;
362 regs->uregs[13] = infop->start_stack;
363 /* FIXME - what to for failure of get_user()? */
364 get_user_ual(regs->uregs[2], stack + 8); /* envp */
365 get_user_ual(regs->uregs[1], stack + 4); /* envp */
366 /* XXX: it seems that r0 is zeroed after ! */
367 regs->uregs[0] = 0;
368 /* For uClinux PIC binaries. */
369 /* XXX: Linux does this only on ARM with no MMU (do we care ?) */
370 regs->uregs[10] = infop->start_data;
371
372 /* Support ARM FDPIC. */
373 if (info_is_fdpic(infop)) {
374 /* As described in the ABI document, r7 points to the loadmap info
375 * prepared by the kernel. If an interpreter is needed, r8 points
376 * to the interpreter loadmap and r9 points to the interpreter
377 * PT_DYNAMIC info. If no interpreter is needed, r8 is zero, and
378 * r9 points to the main program PT_DYNAMIC info.
379 */
380 regs->uregs[7] = infop->loadmap_addr;
381 if (infop->interpreter_loadmap_addr) {
382 /* Executable is dynamically loaded. */
383 regs->uregs[8] = infop->interpreter_loadmap_addr;
384 regs->uregs[9] = infop->interpreter_pt_dynamic_addr;
385 } else {
386 regs->uregs[8] = 0;
387 regs->uregs[9] = infop->pt_dynamic_addr;
388 }
389 }
390 }
391
392 #define ELF_NREG 18
393 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
394
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUARMState * env)395 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUARMState *env)
396 {
397 (*regs)[0] = tswapreg(env->regs[0]);
398 (*regs)[1] = tswapreg(env->regs[1]);
399 (*regs)[2] = tswapreg(env->regs[2]);
400 (*regs)[3] = tswapreg(env->regs[3]);
401 (*regs)[4] = tswapreg(env->regs[4]);
402 (*regs)[5] = tswapreg(env->regs[5]);
403 (*regs)[6] = tswapreg(env->regs[6]);
404 (*regs)[7] = tswapreg(env->regs[7]);
405 (*regs)[8] = tswapreg(env->regs[8]);
406 (*regs)[9] = tswapreg(env->regs[9]);
407 (*regs)[10] = tswapreg(env->regs[10]);
408 (*regs)[11] = tswapreg(env->regs[11]);
409 (*regs)[12] = tswapreg(env->regs[12]);
410 (*regs)[13] = tswapreg(env->regs[13]);
411 (*regs)[14] = tswapreg(env->regs[14]);
412 (*regs)[15] = tswapreg(env->regs[15]);
413
414 (*regs)[16] = tswapreg(cpsr_read((CPUARMState *)env));
415 (*regs)[17] = tswapreg(env->regs[0]); /* XXX */
416 }
417
418 #define USE_ELF_CORE_DUMP
419 #define ELF_EXEC_PAGESIZE 4096
420
421 enum
422 {
423 ARM_HWCAP_ARM_SWP = 1 << 0,
424 ARM_HWCAP_ARM_HALF = 1 << 1,
425 ARM_HWCAP_ARM_THUMB = 1 << 2,
426 ARM_HWCAP_ARM_26BIT = 1 << 3,
427 ARM_HWCAP_ARM_FAST_MULT = 1 << 4,
428 ARM_HWCAP_ARM_FPA = 1 << 5,
429 ARM_HWCAP_ARM_VFP = 1 << 6,
430 ARM_HWCAP_ARM_EDSP = 1 << 7,
431 ARM_HWCAP_ARM_JAVA = 1 << 8,
432 ARM_HWCAP_ARM_IWMMXT = 1 << 9,
433 ARM_HWCAP_ARM_CRUNCH = 1 << 10,
434 ARM_HWCAP_ARM_THUMBEE = 1 << 11,
435 ARM_HWCAP_ARM_NEON = 1 << 12,
436 ARM_HWCAP_ARM_VFPv3 = 1 << 13,
437 ARM_HWCAP_ARM_VFPv3D16 = 1 << 14,
438 ARM_HWCAP_ARM_TLS = 1 << 15,
439 ARM_HWCAP_ARM_VFPv4 = 1 << 16,
440 ARM_HWCAP_ARM_IDIVA = 1 << 17,
441 ARM_HWCAP_ARM_IDIVT = 1 << 18,
442 ARM_HWCAP_ARM_VFPD32 = 1 << 19,
443 ARM_HWCAP_ARM_LPAE = 1 << 20,
444 ARM_HWCAP_ARM_EVTSTRM = 1 << 21,
445 ARM_HWCAP_ARM_FPHP = 1 << 22,
446 ARM_HWCAP_ARM_ASIMDHP = 1 << 23,
447 ARM_HWCAP_ARM_ASIMDDP = 1 << 24,
448 ARM_HWCAP_ARM_ASIMDFHM = 1 << 25,
449 ARM_HWCAP_ARM_ASIMDBF16 = 1 << 26,
450 ARM_HWCAP_ARM_I8MM = 1 << 27,
451 };
452
453 enum {
454 ARM_HWCAP2_ARM_AES = 1 << 0,
455 ARM_HWCAP2_ARM_PMULL = 1 << 1,
456 ARM_HWCAP2_ARM_SHA1 = 1 << 2,
457 ARM_HWCAP2_ARM_SHA2 = 1 << 3,
458 ARM_HWCAP2_ARM_CRC32 = 1 << 4,
459 ARM_HWCAP2_ARM_SB = 1 << 5,
460 ARM_HWCAP2_ARM_SSBS = 1 << 6,
461 };
462
463 /* The commpage only exists for 32 bit kernels */
464
465 #define HI_COMMPAGE (intptr_t)0xffff0f00u
466
init_guest_commpage(void)467 static bool init_guest_commpage(void)
468 {
469 ARMCPU *cpu = ARM_CPU(thread_cpu);
470 int host_page_size = qemu_real_host_page_size();
471 abi_ptr commpage;
472 void *want;
473 void *addr;
474
475 /*
476 * M-profile allocates maximum of 2GB address space, so can never
477 * allocate the commpage. Skip it.
478 */
479 if (arm_feature(&cpu->env, ARM_FEATURE_M)) {
480 return true;
481 }
482
483 commpage = HI_COMMPAGE & -host_page_size;
484 want = g2h_untagged(commpage);
485 addr = mmap(want, host_page_size, PROT_READ | PROT_WRITE,
486 MAP_ANONYMOUS | MAP_PRIVATE |
487 (commpage < reserved_va ? MAP_FIXED : MAP_FIXED_NOREPLACE),
488 -1, 0);
489
490 if (addr == MAP_FAILED) {
491 perror("Allocating guest commpage");
492 exit(EXIT_FAILURE);
493 }
494 if (addr != want) {
495 return false;
496 }
497
498 /* Set kernel helper versions; rest of page is 0. */
499 __put_user(5, (uint32_t *)g2h_untagged(0xffff0ffcu));
500
501 if (mprotect(addr, host_page_size, PROT_READ)) {
502 perror("Protecting guest commpage");
503 exit(EXIT_FAILURE);
504 }
505
506 page_set_flags(commpage, commpage | (host_page_size - 1),
507 PAGE_READ | PAGE_EXEC | PAGE_VALID);
508 return true;
509 }
510
511 #define ELF_HWCAP get_elf_hwcap()
512 #define ELF_HWCAP2 get_elf_hwcap2()
513
get_elf_hwcap(void)514 uint32_t get_elf_hwcap(void)
515 {
516 ARMCPU *cpu = ARM_CPU(thread_cpu);
517 uint32_t hwcaps = 0;
518
519 hwcaps |= ARM_HWCAP_ARM_SWP;
520 hwcaps |= ARM_HWCAP_ARM_HALF;
521 hwcaps |= ARM_HWCAP_ARM_THUMB;
522 hwcaps |= ARM_HWCAP_ARM_FAST_MULT;
523
524 /* probe for the extra features */
525 #define GET_FEATURE(feat, hwcap) \
526 do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0)
527
528 #define GET_FEATURE_ID(feat, hwcap) \
529 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
530
531 /* EDSP is in v5TE and above, but all our v5 CPUs are v5TE */
532 GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);
533 GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
534 GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
535 GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
536 GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS);
537 GET_FEATURE(ARM_FEATURE_LPAE, ARM_HWCAP_ARM_LPAE);
538 GET_FEATURE_ID(aa32_arm_div, ARM_HWCAP_ARM_IDIVA);
539 GET_FEATURE_ID(aa32_thumb_div, ARM_HWCAP_ARM_IDIVT);
540 GET_FEATURE_ID(aa32_vfp, ARM_HWCAP_ARM_VFP);
541
542 if (cpu_isar_feature(aa32_fpsp_v3, cpu) ||
543 cpu_isar_feature(aa32_fpdp_v3, cpu)) {
544 hwcaps |= ARM_HWCAP_ARM_VFPv3;
545 if (cpu_isar_feature(aa32_simd_r32, cpu)) {
546 hwcaps |= ARM_HWCAP_ARM_VFPD32;
547 } else {
548 hwcaps |= ARM_HWCAP_ARM_VFPv3D16;
549 }
550 }
551 GET_FEATURE_ID(aa32_simdfmac, ARM_HWCAP_ARM_VFPv4);
552 /*
553 * MVFR1.FPHP and .SIMDHP must be in sync, and QEMU uses the same
554 * isar_feature function for both. The kernel reports them as two hwcaps.
555 */
556 GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_FPHP);
557 GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_ASIMDHP);
558 GET_FEATURE_ID(aa32_dp, ARM_HWCAP_ARM_ASIMDDP);
559 GET_FEATURE_ID(aa32_fhm, ARM_HWCAP_ARM_ASIMDFHM);
560 GET_FEATURE_ID(aa32_bf16, ARM_HWCAP_ARM_ASIMDBF16);
561 GET_FEATURE_ID(aa32_i8mm, ARM_HWCAP_ARM_I8MM);
562
563 return hwcaps;
564 }
565
get_elf_hwcap2(void)566 uint64_t get_elf_hwcap2(void)
567 {
568 ARMCPU *cpu = ARM_CPU(thread_cpu);
569 uint64_t hwcaps = 0;
570
571 GET_FEATURE_ID(aa32_aes, ARM_HWCAP2_ARM_AES);
572 GET_FEATURE_ID(aa32_pmull, ARM_HWCAP2_ARM_PMULL);
573 GET_FEATURE_ID(aa32_sha1, ARM_HWCAP2_ARM_SHA1);
574 GET_FEATURE_ID(aa32_sha2, ARM_HWCAP2_ARM_SHA2);
575 GET_FEATURE_ID(aa32_crc32, ARM_HWCAP2_ARM_CRC32);
576 GET_FEATURE_ID(aa32_sb, ARM_HWCAP2_ARM_SB);
577 GET_FEATURE_ID(aa32_ssbs, ARM_HWCAP2_ARM_SSBS);
578 return hwcaps;
579 }
580
elf_hwcap_str(uint32_t bit)581 const char *elf_hwcap_str(uint32_t bit)
582 {
583 static const char *hwcap_str[] = {
584 [__builtin_ctz(ARM_HWCAP_ARM_SWP )] = "swp",
585 [__builtin_ctz(ARM_HWCAP_ARM_HALF )] = "half",
586 [__builtin_ctz(ARM_HWCAP_ARM_THUMB )] = "thumb",
587 [__builtin_ctz(ARM_HWCAP_ARM_26BIT )] = "26bit",
588 [__builtin_ctz(ARM_HWCAP_ARM_FAST_MULT)] = "fast_mult",
589 [__builtin_ctz(ARM_HWCAP_ARM_FPA )] = "fpa",
590 [__builtin_ctz(ARM_HWCAP_ARM_VFP )] = "vfp",
591 [__builtin_ctz(ARM_HWCAP_ARM_EDSP )] = "edsp",
592 [__builtin_ctz(ARM_HWCAP_ARM_JAVA )] = "java",
593 [__builtin_ctz(ARM_HWCAP_ARM_IWMMXT )] = "iwmmxt",
594 [__builtin_ctz(ARM_HWCAP_ARM_CRUNCH )] = "crunch",
595 [__builtin_ctz(ARM_HWCAP_ARM_THUMBEE )] = "thumbee",
596 [__builtin_ctz(ARM_HWCAP_ARM_NEON )] = "neon",
597 [__builtin_ctz(ARM_HWCAP_ARM_VFPv3 )] = "vfpv3",
598 [__builtin_ctz(ARM_HWCAP_ARM_VFPv3D16 )] = "vfpv3d16",
599 [__builtin_ctz(ARM_HWCAP_ARM_TLS )] = "tls",
600 [__builtin_ctz(ARM_HWCAP_ARM_VFPv4 )] = "vfpv4",
601 [__builtin_ctz(ARM_HWCAP_ARM_IDIVA )] = "idiva",
602 [__builtin_ctz(ARM_HWCAP_ARM_IDIVT )] = "idivt",
603 [__builtin_ctz(ARM_HWCAP_ARM_VFPD32 )] = "vfpd32",
604 [__builtin_ctz(ARM_HWCAP_ARM_LPAE )] = "lpae",
605 [__builtin_ctz(ARM_HWCAP_ARM_EVTSTRM )] = "evtstrm",
606 [__builtin_ctz(ARM_HWCAP_ARM_FPHP )] = "fphp",
607 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDHP )] = "asimdhp",
608 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDDP )] = "asimddp",
609 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDFHM )] = "asimdfhm",
610 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDBF16)] = "asimdbf16",
611 [__builtin_ctz(ARM_HWCAP_ARM_I8MM )] = "i8mm",
612 };
613
614 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
615 }
616
elf_hwcap2_str(uint32_t bit)617 const char *elf_hwcap2_str(uint32_t bit)
618 {
619 static const char *hwcap_str[] = {
620 [__builtin_ctz(ARM_HWCAP2_ARM_AES )] = "aes",
621 [__builtin_ctz(ARM_HWCAP2_ARM_PMULL)] = "pmull",
622 [__builtin_ctz(ARM_HWCAP2_ARM_SHA1 )] = "sha1",
623 [__builtin_ctz(ARM_HWCAP2_ARM_SHA2 )] = "sha2",
624 [__builtin_ctz(ARM_HWCAP2_ARM_CRC32)] = "crc32",
625 [__builtin_ctz(ARM_HWCAP2_ARM_SB )] = "sb",
626 [__builtin_ctz(ARM_HWCAP2_ARM_SSBS )] = "ssbs",
627 };
628
629 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
630 }
631
632 #undef GET_FEATURE
633 #undef GET_FEATURE_ID
634
635 #define ELF_PLATFORM get_elf_platform()
636
get_elf_platform(void)637 static const char *get_elf_platform(void)
638 {
639 CPUARMState *env = cpu_env(thread_cpu);
640
641 #if TARGET_BIG_ENDIAN
642 # define END "b"
643 #else
644 # define END "l"
645 #endif
646
647 if (arm_feature(env, ARM_FEATURE_V8)) {
648 return "v8" END;
649 } else if (arm_feature(env, ARM_FEATURE_V7)) {
650 if (arm_feature(env, ARM_FEATURE_M)) {
651 return "v7m" END;
652 } else {
653 return "v7" END;
654 }
655 } else if (arm_feature(env, ARM_FEATURE_V6)) {
656 return "v6" END;
657 } else if (arm_feature(env, ARM_FEATURE_V5)) {
658 return "v5" END;
659 } else {
660 return "v4" END;
661 }
662
663 #undef END
664 }
665
666 #if TARGET_BIG_ENDIAN
667 #include "elf.h"
668 #include "vdso-be8.c.inc"
669 #include "vdso-be32.c.inc"
670
vdso_image_info(uint32_t elf_flags)671 static const VdsoImageInfo *vdso_image_info(uint32_t elf_flags)
672 {
673 return (EF_ARM_EABI_VERSION(elf_flags) >= EF_ARM_EABI_VER4
674 && (elf_flags & EF_ARM_BE8)
675 ? &vdso_be8_image_info
676 : &vdso_be32_image_info);
677 }
678 #define vdso_image_info vdso_image_info
679 #else
680 # define VDSO_HEADER "vdso-le.c.inc"
681 #endif
682
683 #else
684 /* 64 bit ARM definitions */
685
686 #define ELF_ARCH EM_AARCH64
687 #define ELF_CLASS ELFCLASS64
688 #if TARGET_BIG_ENDIAN
689 # define ELF_PLATFORM "aarch64_be"
690 #else
691 # define ELF_PLATFORM "aarch64"
692 #endif
693
init_thread(struct target_pt_regs * regs,struct image_info * infop)694 static inline void init_thread(struct target_pt_regs *regs,
695 struct image_info *infop)
696 {
697 abi_long stack = infop->start_stack;
698 memset(regs, 0, sizeof(*regs));
699
700 regs->pc = infop->entry & ~0x3ULL;
701 regs->sp = stack;
702 }
703
704 #define ELF_NREG 34
705 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
706
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUARMState * env)707 static void elf_core_copy_regs(target_elf_gregset_t *regs,
708 const CPUARMState *env)
709 {
710 int i;
711
712 for (i = 0; i < 32; i++) {
713 (*regs)[i] = tswapreg(env->xregs[i]);
714 }
715 (*regs)[32] = tswapreg(env->pc);
716 (*regs)[33] = tswapreg(pstate_read((CPUARMState *)env));
717 }
718
719 #define USE_ELF_CORE_DUMP
720 #define ELF_EXEC_PAGESIZE 4096
721
722 enum {
723 ARM_HWCAP_A64_FP = 1 << 0,
724 ARM_HWCAP_A64_ASIMD = 1 << 1,
725 ARM_HWCAP_A64_EVTSTRM = 1 << 2,
726 ARM_HWCAP_A64_AES = 1 << 3,
727 ARM_HWCAP_A64_PMULL = 1 << 4,
728 ARM_HWCAP_A64_SHA1 = 1 << 5,
729 ARM_HWCAP_A64_SHA2 = 1 << 6,
730 ARM_HWCAP_A64_CRC32 = 1 << 7,
731 ARM_HWCAP_A64_ATOMICS = 1 << 8,
732 ARM_HWCAP_A64_FPHP = 1 << 9,
733 ARM_HWCAP_A64_ASIMDHP = 1 << 10,
734 ARM_HWCAP_A64_CPUID = 1 << 11,
735 ARM_HWCAP_A64_ASIMDRDM = 1 << 12,
736 ARM_HWCAP_A64_JSCVT = 1 << 13,
737 ARM_HWCAP_A64_FCMA = 1 << 14,
738 ARM_HWCAP_A64_LRCPC = 1 << 15,
739 ARM_HWCAP_A64_DCPOP = 1 << 16,
740 ARM_HWCAP_A64_SHA3 = 1 << 17,
741 ARM_HWCAP_A64_SM3 = 1 << 18,
742 ARM_HWCAP_A64_SM4 = 1 << 19,
743 ARM_HWCAP_A64_ASIMDDP = 1 << 20,
744 ARM_HWCAP_A64_SHA512 = 1 << 21,
745 ARM_HWCAP_A64_SVE = 1 << 22,
746 ARM_HWCAP_A64_ASIMDFHM = 1 << 23,
747 ARM_HWCAP_A64_DIT = 1 << 24,
748 ARM_HWCAP_A64_USCAT = 1 << 25,
749 ARM_HWCAP_A64_ILRCPC = 1 << 26,
750 ARM_HWCAP_A64_FLAGM = 1 << 27,
751 ARM_HWCAP_A64_SSBS = 1 << 28,
752 ARM_HWCAP_A64_SB = 1 << 29,
753 ARM_HWCAP_A64_PACA = 1 << 30,
754 ARM_HWCAP_A64_PACG = 1ULL << 31,
755 ARM_HWCAP_A64_GCS = 1ULL << 32,
756 ARM_HWCAP_A64_CMPBR = 1ULL << 33,
757 ARM_HWCAP_A64_FPRCVT = 1ULL << 34,
758 ARM_HWCAP_A64_F8MM8 = 1ULL << 35,
759 ARM_HWCAP_A64_F8MM4 = 1ULL << 36,
760 ARM_HWCAP_A64_SVE_F16MM = 1ULL << 37,
761 ARM_HWCAP_A64_SVE_ELTPERM = 1ULL << 38,
762 ARM_HWCAP_A64_SVE_AES2 = 1ULL << 39,
763 ARM_HWCAP_A64_SVE_BFSCALE = 1ULL << 40,
764 ARM_HWCAP_A64_SVE2P2 = 1ULL << 41,
765 ARM_HWCAP_A64_SME2P2 = 1ULL << 42,
766 ARM_HWCAP_A64_SME_SBITPERM = 1ULL << 43,
767 ARM_HWCAP_A64_SME_AES = 1ULL << 44,
768 ARM_HWCAP_A64_SME_SFEXPA = 1ULL << 45,
769 ARM_HWCAP_A64_SME_STMOP = 1ULL << 46,
770 ARM_HWCAP_A64_SME_SMOP4 = 1ULL << 47,
771
772 ARM_HWCAP2_A64_DCPODP = 1 << 0,
773 ARM_HWCAP2_A64_SVE2 = 1 << 1,
774 ARM_HWCAP2_A64_SVEAES = 1 << 2,
775 ARM_HWCAP2_A64_SVEPMULL = 1 << 3,
776 ARM_HWCAP2_A64_SVEBITPERM = 1 << 4,
777 ARM_HWCAP2_A64_SVESHA3 = 1 << 5,
778 ARM_HWCAP2_A64_SVESM4 = 1 << 6,
779 ARM_HWCAP2_A64_FLAGM2 = 1 << 7,
780 ARM_HWCAP2_A64_FRINT = 1 << 8,
781 ARM_HWCAP2_A64_SVEI8MM = 1 << 9,
782 ARM_HWCAP2_A64_SVEF32MM = 1 << 10,
783 ARM_HWCAP2_A64_SVEF64MM = 1 << 11,
784 ARM_HWCAP2_A64_SVEBF16 = 1 << 12,
785 ARM_HWCAP2_A64_I8MM = 1 << 13,
786 ARM_HWCAP2_A64_BF16 = 1 << 14,
787 ARM_HWCAP2_A64_DGH = 1 << 15,
788 ARM_HWCAP2_A64_RNG = 1 << 16,
789 ARM_HWCAP2_A64_BTI = 1 << 17,
790 ARM_HWCAP2_A64_MTE = 1 << 18,
791 ARM_HWCAP2_A64_ECV = 1 << 19,
792 ARM_HWCAP2_A64_AFP = 1 << 20,
793 ARM_HWCAP2_A64_RPRES = 1 << 21,
794 ARM_HWCAP2_A64_MTE3 = 1 << 22,
795 ARM_HWCAP2_A64_SME = 1 << 23,
796 ARM_HWCAP2_A64_SME_I16I64 = 1 << 24,
797 ARM_HWCAP2_A64_SME_F64F64 = 1 << 25,
798 ARM_HWCAP2_A64_SME_I8I32 = 1 << 26,
799 ARM_HWCAP2_A64_SME_F16F32 = 1 << 27,
800 ARM_HWCAP2_A64_SME_B16F32 = 1 << 28,
801 ARM_HWCAP2_A64_SME_F32F32 = 1 << 29,
802 ARM_HWCAP2_A64_SME_FA64 = 1 << 30,
803 ARM_HWCAP2_A64_WFXT = 1ULL << 31,
804 ARM_HWCAP2_A64_EBF16 = 1ULL << 32,
805 ARM_HWCAP2_A64_SVE_EBF16 = 1ULL << 33,
806 ARM_HWCAP2_A64_CSSC = 1ULL << 34,
807 ARM_HWCAP2_A64_RPRFM = 1ULL << 35,
808 ARM_HWCAP2_A64_SVE2P1 = 1ULL << 36,
809 ARM_HWCAP2_A64_SME2 = 1ULL << 37,
810 ARM_HWCAP2_A64_SME2P1 = 1ULL << 38,
811 ARM_HWCAP2_A64_SME_I16I32 = 1ULL << 39,
812 ARM_HWCAP2_A64_SME_BI32I32 = 1ULL << 40,
813 ARM_HWCAP2_A64_SME_B16B16 = 1ULL << 41,
814 ARM_HWCAP2_A64_SME_F16F16 = 1ULL << 42,
815 ARM_HWCAP2_A64_MOPS = 1ULL << 43,
816 ARM_HWCAP2_A64_HBC = 1ULL << 44,
817 ARM_HWCAP2_A64_SVE_B16B16 = 1ULL << 45,
818 ARM_HWCAP2_A64_LRCPC3 = 1ULL << 46,
819 ARM_HWCAP2_A64_LSE128 = 1ULL << 47,
820 ARM_HWCAP2_A64_FPMR = 1ULL << 48,
821 ARM_HWCAP2_A64_LUT = 1ULL << 49,
822 ARM_HWCAP2_A64_FAMINMAX = 1ULL << 50,
823 ARM_HWCAP2_A64_F8CVT = 1ULL << 51,
824 ARM_HWCAP2_A64_F8FMA = 1ULL << 52,
825 ARM_HWCAP2_A64_F8DP4 = 1ULL << 53,
826 ARM_HWCAP2_A64_F8DP2 = 1ULL << 54,
827 ARM_HWCAP2_A64_F8E4M3 = 1ULL << 55,
828 ARM_HWCAP2_A64_F8E5M2 = 1ULL << 56,
829 ARM_HWCAP2_A64_SME_LUTV2 = 1ULL << 57,
830 ARM_HWCAP2_A64_SME_F8F16 = 1ULL << 58,
831 ARM_HWCAP2_A64_SME_F8F32 = 1ULL << 59,
832 ARM_HWCAP2_A64_SME_SF8FMA = 1ULL << 60,
833 ARM_HWCAP2_A64_SME_SF8DP4 = 1ULL << 61,
834 ARM_HWCAP2_A64_SME_SF8DP2 = 1ULL << 62,
835 ARM_HWCAP2_A64_POE = 1ULL << 63,
836 };
837
838 #define ELF_HWCAP get_elf_hwcap()
839 #define ELF_HWCAP2 get_elf_hwcap2()
840
841 #define GET_FEATURE_ID(feat, hwcap) \
842 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
843
get_elf_hwcap(void)844 uint32_t get_elf_hwcap(void)
845 {
846 ARMCPU *cpu = ARM_CPU(thread_cpu);
847 uint32_t hwcaps = 0;
848
849 hwcaps |= ARM_HWCAP_A64_FP;
850 hwcaps |= ARM_HWCAP_A64_ASIMD;
851 hwcaps |= ARM_HWCAP_A64_CPUID;
852
853 /* probe for the extra features */
854
855 GET_FEATURE_ID(aa64_aes, ARM_HWCAP_A64_AES);
856 GET_FEATURE_ID(aa64_pmull, ARM_HWCAP_A64_PMULL);
857 GET_FEATURE_ID(aa64_sha1, ARM_HWCAP_A64_SHA1);
858 GET_FEATURE_ID(aa64_sha256, ARM_HWCAP_A64_SHA2);
859 GET_FEATURE_ID(aa64_sha512, ARM_HWCAP_A64_SHA512);
860 GET_FEATURE_ID(aa64_crc32, ARM_HWCAP_A64_CRC32);
861 GET_FEATURE_ID(aa64_sha3, ARM_HWCAP_A64_SHA3);
862 GET_FEATURE_ID(aa64_sm3, ARM_HWCAP_A64_SM3);
863 GET_FEATURE_ID(aa64_sm4, ARM_HWCAP_A64_SM4);
864 GET_FEATURE_ID(aa64_fp16, ARM_HWCAP_A64_FPHP | ARM_HWCAP_A64_ASIMDHP);
865 GET_FEATURE_ID(aa64_atomics, ARM_HWCAP_A64_ATOMICS);
866 GET_FEATURE_ID(aa64_lse2, ARM_HWCAP_A64_USCAT);
867 GET_FEATURE_ID(aa64_rdm, ARM_HWCAP_A64_ASIMDRDM);
868 GET_FEATURE_ID(aa64_dp, ARM_HWCAP_A64_ASIMDDP);
869 GET_FEATURE_ID(aa64_fcma, ARM_HWCAP_A64_FCMA);
870 GET_FEATURE_ID(aa64_sve, ARM_HWCAP_A64_SVE);
871 GET_FEATURE_ID(aa64_pauth, ARM_HWCAP_A64_PACA | ARM_HWCAP_A64_PACG);
872 GET_FEATURE_ID(aa64_fhm, ARM_HWCAP_A64_ASIMDFHM);
873 GET_FEATURE_ID(aa64_dit, ARM_HWCAP_A64_DIT);
874 GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT);
875 GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB);
876 GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM);
877 GET_FEATURE_ID(aa64_dcpop, ARM_HWCAP_A64_DCPOP);
878 GET_FEATURE_ID(aa64_rcpc_8_3, ARM_HWCAP_A64_LRCPC);
879 GET_FEATURE_ID(aa64_rcpc_8_4, ARM_HWCAP_A64_ILRCPC);
880
881 return hwcaps;
882 }
883
get_elf_hwcap2(void)884 uint64_t get_elf_hwcap2(void)
885 {
886 ARMCPU *cpu = ARM_CPU(thread_cpu);
887 uint64_t hwcaps = 0;
888
889 GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP);
890 GET_FEATURE_ID(aa64_sve2, ARM_HWCAP2_A64_SVE2);
891 GET_FEATURE_ID(aa64_sve2_aes, ARM_HWCAP2_A64_SVEAES);
892 GET_FEATURE_ID(aa64_sve2_pmull128, ARM_HWCAP2_A64_SVEPMULL);
893 GET_FEATURE_ID(aa64_sve2_bitperm, ARM_HWCAP2_A64_SVEBITPERM);
894 GET_FEATURE_ID(aa64_sve2_sha3, ARM_HWCAP2_A64_SVESHA3);
895 GET_FEATURE_ID(aa64_sve2_sm4, ARM_HWCAP2_A64_SVESM4);
896 GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2);
897 GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT);
898 GET_FEATURE_ID(aa64_sve_i8mm, ARM_HWCAP2_A64_SVEI8MM);
899 GET_FEATURE_ID(aa64_sve_f32mm, ARM_HWCAP2_A64_SVEF32MM);
900 GET_FEATURE_ID(aa64_sve_f64mm, ARM_HWCAP2_A64_SVEF64MM);
901 GET_FEATURE_ID(aa64_sve_bf16, ARM_HWCAP2_A64_SVEBF16);
902 GET_FEATURE_ID(aa64_i8mm, ARM_HWCAP2_A64_I8MM);
903 GET_FEATURE_ID(aa64_bf16, ARM_HWCAP2_A64_BF16);
904 GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG);
905 GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI);
906 GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE);
907 GET_FEATURE_ID(aa64_mte3, ARM_HWCAP2_A64_MTE3);
908 GET_FEATURE_ID(aa64_sme, (ARM_HWCAP2_A64_SME |
909 ARM_HWCAP2_A64_SME_F32F32 |
910 ARM_HWCAP2_A64_SME_B16F32 |
911 ARM_HWCAP2_A64_SME_F16F32 |
912 ARM_HWCAP2_A64_SME_I8I32));
913 GET_FEATURE_ID(aa64_sme_f64f64, ARM_HWCAP2_A64_SME_F64F64);
914 GET_FEATURE_ID(aa64_sme_i16i64, ARM_HWCAP2_A64_SME_I16I64);
915 GET_FEATURE_ID(aa64_sme_fa64, ARM_HWCAP2_A64_SME_FA64);
916 GET_FEATURE_ID(aa64_hbc, ARM_HWCAP2_A64_HBC);
917 GET_FEATURE_ID(aa64_mops, ARM_HWCAP2_A64_MOPS);
918 GET_FEATURE_ID(aa64_sve2p1, ARM_HWCAP2_A64_SVE2P1);
919 GET_FEATURE_ID(aa64_sme2, (ARM_HWCAP2_A64_SME2 |
920 ARM_HWCAP2_A64_SME_I16I32 |
921 ARM_HWCAP2_A64_SME_BI32I32));
922 GET_FEATURE_ID(aa64_sme2p1, ARM_HWCAP2_A64_SME2P1);
923 GET_FEATURE_ID(aa64_sme_b16b16, ARM_HWCAP2_A64_SME_B16B16);
924 GET_FEATURE_ID(aa64_sme_f16f16, ARM_HWCAP2_A64_SME_F16F16);
925 GET_FEATURE_ID(aa64_sve_b16b16, ARM_HWCAP2_A64_SVE_B16B16);
926
927 return hwcaps;
928 }
929
elf_hwcap_str(uint32_t bit)930 const char *elf_hwcap_str(uint32_t bit)
931 {
932 static const char * const hwcap_str[] = {
933 [__builtin_ctz(ARM_HWCAP_A64_FP )] = "fp",
934 [__builtin_ctz(ARM_HWCAP_A64_ASIMD )] = "asimd",
935 [__builtin_ctz(ARM_HWCAP_A64_EVTSTRM )] = "evtstrm",
936 [__builtin_ctz(ARM_HWCAP_A64_AES )] = "aes",
937 [__builtin_ctz(ARM_HWCAP_A64_PMULL )] = "pmull",
938 [__builtin_ctz(ARM_HWCAP_A64_SHA1 )] = "sha1",
939 [__builtin_ctz(ARM_HWCAP_A64_SHA2 )] = "sha2",
940 [__builtin_ctz(ARM_HWCAP_A64_CRC32 )] = "crc32",
941 [__builtin_ctz(ARM_HWCAP_A64_ATOMICS )] = "atomics",
942 [__builtin_ctz(ARM_HWCAP_A64_FPHP )] = "fphp",
943 [__builtin_ctz(ARM_HWCAP_A64_ASIMDHP )] = "asimdhp",
944 [__builtin_ctz(ARM_HWCAP_A64_CPUID )] = "cpuid",
945 [__builtin_ctz(ARM_HWCAP_A64_ASIMDRDM)] = "asimdrdm",
946 [__builtin_ctz(ARM_HWCAP_A64_JSCVT )] = "jscvt",
947 [__builtin_ctz(ARM_HWCAP_A64_FCMA )] = "fcma",
948 [__builtin_ctz(ARM_HWCAP_A64_LRCPC )] = "lrcpc",
949 [__builtin_ctz(ARM_HWCAP_A64_DCPOP )] = "dcpop",
950 [__builtin_ctz(ARM_HWCAP_A64_SHA3 )] = "sha3",
951 [__builtin_ctz(ARM_HWCAP_A64_SM3 )] = "sm3",
952 [__builtin_ctz(ARM_HWCAP_A64_SM4 )] = "sm4",
953 [__builtin_ctz(ARM_HWCAP_A64_ASIMDDP )] = "asimddp",
954 [__builtin_ctz(ARM_HWCAP_A64_SHA512 )] = "sha512",
955 [__builtin_ctz(ARM_HWCAP_A64_SVE )] = "sve",
956 [__builtin_ctz(ARM_HWCAP_A64_ASIMDFHM)] = "asimdfhm",
957 [__builtin_ctz(ARM_HWCAP_A64_DIT )] = "dit",
958 [__builtin_ctz(ARM_HWCAP_A64_USCAT )] = "uscat",
959 [__builtin_ctz(ARM_HWCAP_A64_ILRCPC )] = "ilrcpc",
960 [__builtin_ctz(ARM_HWCAP_A64_FLAGM )] = "flagm",
961 [__builtin_ctz(ARM_HWCAP_A64_SSBS )] = "ssbs",
962 [__builtin_ctz(ARM_HWCAP_A64_SB )] = "sb",
963 [__builtin_ctz(ARM_HWCAP_A64_PACA )] = "paca",
964 [__builtin_ctz(ARM_HWCAP_A64_PACG )] = "pacg",
965 [__builtin_ctzll(ARM_HWCAP_A64_GCS )] = "gcs",
966 [__builtin_ctzll(ARM_HWCAP_A64_CMPBR )] = "cmpbr",
967 [__builtin_ctzll(ARM_HWCAP_A64_FPRCVT)] = "fprcvt",
968 [__builtin_ctzll(ARM_HWCAP_A64_F8MM8 )] = "f8mm8",
969 [__builtin_ctzll(ARM_HWCAP_A64_F8MM4 )] = "f8mm4",
970 [__builtin_ctzll(ARM_HWCAP_A64_SVE_F16MM)] = "svef16mm",
971 [__builtin_ctzll(ARM_HWCAP_A64_SVE_ELTPERM)] = "sveeltperm",
972 [__builtin_ctzll(ARM_HWCAP_A64_SVE_AES2)] = "sveaes2",
973 [__builtin_ctzll(ARM_HWCAP_A64_SVE_BFSCALE)] = "svebfscale",
974 [__builtin_ctzll(ARM_HWCAP_A64_SVE2P2)] = "sve2p2",
975 [__builtin_ctzll(ARM_HWCAP_A64_SME2P2)] = "sme2p2",
976 [__builtin_ctzll(ARM_HWCAP_A64_SME_SBITPERM)] = "smesbitperm",
977 [__builtin_ctzll(ARM_HWCAP_A64_SME_AES)] = "smeaes",
978 [__builtin_ctzll(ARM_HWCAP_A64_SME_SFEXPA)] = "smesfexpa",
979 [__builtin_ctzll(ARM_HWCAP_A64_SME_STMOP)] = "smestmop",
980 [__builtin_ctzll(ARM_HWCAP_A64_SME_SMOP4)] = "smesmop4",
981 };
982
983 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
984 }
985
elf_hwcap2_str(uint32_t bit)986 const char *elf_hwcap2_str(uint32_t bit)
987 {
988 static const char * const hwcap_str[] = {
989 [__builtin_ctz(ARM_HWCAP2_A64_DCPODP )] = "dcpodp",
990 [__builtin_ctz(ARM_HWCAP2_A64_SVE2 )] = "sve2",
991 [__builtin_ctz(ARM_HWCAP2_A64_SVEAES )] = "sveaes",
992 [__builtin_ctz(ARM_HWCAP2_A64_SVEPMULL )] = "svepmull",
993 [__builtin_ctz(ARM_HWCAP2_A64_SVEBITPERM )] = "svebitperm",
994 [__builtin_ctz(ARM_HWCAP2_A64_SVESHA3 )] = "svesha3",
995 [__builtin_ctz(ARM_HWCAP2_A64_SVESM4 )] = "svesm4",
996 [__builtin_ctz(ARM_HWCAP2_A64_FLAGM2 )] = "flagm2",
997 [__builtin_ctz(ARM_HWCAP2_A64_FRINT )] = "frint",
998 [__builtin_ctz(ARM_HWCAP2_A64_SVEI8MM )] = "svei8mm",
999 [__builtin_ctz(ARM_HWCAP2_A64_SVEF32MM )] = "svef32mm",
1000 [__builtin_ctz(ARM_HWCAP2_A64_SVEF64MM )] = "svef64mm",
1001 [__builtin_ctz(ARM_HWCAP2_A64_SVEBF16 )] = "svebf16",
1002 [__builtin_ctz(ARM_HWCAP2_A64_I8MM )] = "i8mm",
1003 [__builtin_ctz(ARM_HWCAP2_A64_BF16 )] = "bf16",
1004 [__builtin_ctz(ARM_HWCAP2_A64_DGH )] = "dgh",
1005 [__builtin_ctz(ARM_HWCAP2_A64_RNG )] = "rng",
1006 [__builtin_ctz(ARM_HWCAP2_A64_BTI )] = "bti",
1007 [__builtin_ctz(ARM_HWCAP2_A64_MTE )] = "mte",
1008 [__builtin_ctz(ARM_HWCAP2_A64_ECV )] = "ecv",
1009 [__builtin_ctz(ARM_HWCAP2_A64_AFP )] = "afp",
1010 [__builtin_ctz(ARM_HWCAP2_A64_RPRES )] = "rpres",
1011 [__builtin_ctz(ARM_HWCAP2_A64_MTE3 )] = "mte3",
1012 [__builtin_ctz(ARM_HWCAP2_A64_SME )] = "sme",
1013 [__builtin_ctz(ARM_HWCAP2_A64_SME_I16I64 )] = "smei16i64",
1014 [__builtin_ctz(ARM_HWCAP2_A64_SME_F64F64 )] = "smef64f64",
1015 [__builtin_ctz(ARM_HWCAP2_A64_SME_I8I32 )] = "smei8i32",
1016 [__builtin_ctz(ARM_HWCAP2_A64_SME_F16F32 )] = "smef16f32",
1017 [__builtin_ctz(ARM_HWCAP2_A64_SME_B16F32 )] = "smeb16f32",
1018 [__builtin_ctz(ARM_HWCAP2_A64_SME_F32F32 )] = "smef32f32",
1019 [__builtin_ctz(ARM_HWCAP2_A64_SME_FA64 )] = "smefa64",
1020 [__builtin_ctz(ARM_HWCAP2_A64_WFXT )] = "wfxt",
1021 [__builtin_ctzll(ARM_HWCAP2_A64_EBF16 )] = "ebf16",
1022 [__builtin_ctzll(ARM_HWCAP2_A64_SVE_EBF16 )] = "sveebf16",
1023 [__builtin_ctzll(ARM_HWCAP2_A64_CSSC )] = "cssc",
1024 [__builtin_ctzll(ARM_HWCAP2_A64_RPRFM )] = "rprfm",
1025 [__builtin_ctzll(ARM_HWCAP2_A64_SVE2P1 )] = "sve2p1",
1026 [__builtin_ctzll(ARM_HWCAP2_A64_SME2 )] = "sme2",
1027 [__builtin_ctzll(ARM_HWCAP2_A64_SME2P1 )] = "sme2p1",
1028 [__builtin_ctzll(ARM_HWCAP2_A64_SME_I16I32 )] = "smei16i32",
1029 [__builtin_ctzll(ARM_HWCAP2_A64_SME_BI32I32)] = "smebi32i32",
1030 [__builtin_ctzll(ARM_HWCAP2_A64_SME_B16B16 )] = "smeb16b16",
1031 [__builtin_ctzll(ARM_HWCAP2_A64_SME_F16F16 )] = "smef16f16",
1032 [__builtin_ctzll(ARM_HWCAP2_A64_MOPS )] = "mops",
1033 [__builtin_ctzll(ARM_HWCAP2_A64_HBC )] = "hbc",
1034 [__builtin_ctzll(ARM_HWCAP2_A64_SVE_B16B16 )] = "sveb16b16",
1035 [__builtin_ctzll(ARM_HWCAP2_A64_LRCPC3 )] = "lrcpc3",
1036 [__builtin_ctzll(ARM_HWCAP2_A64_LSE128 )] = "lse128",
1037 [__builtin_ctzll(ARM_HWCAP2_A64_FPMR )] = "fpmr",
1038 [__builtin_ctzll(ARM_HWCAP2_A64_LUT )] = "lut",
1039 [__builtin_ctzll(ARM_HWCAP2_A64_FAMINMAX )] = "faminmax",
1040 [__builtin_ctzll(ARM_HWCAP2_A64_F8CVT )] = "f8cvt",
1041 [__builtin_ctzll(ARM_HWCAP2_A64_F8FMA )] = "f8fma",
1042 [__builtin_ctzll(ARM_HWCAP2_A64_F8DP4 )] = "f8dp4",
1043 [__builtin_ctzll(ARM_HWCAP2_A64_F8DP2 )] = "f8dp2",
1044 [__builtin_ctzll(ARM_HWCAP2_A64_F8E4M3 )] = "f8e4m3",
1045 [__builtin_ctzll(ARM_HWCAP2_A64_F8E5M2 )] = "f8e5m2",
1046 [__builtin_ctzll(ARM_HWCAP2_A64_SME_LUTV2 )] = "smelutv2",
1047 [__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F16 )] = "smef8f16",
1048 [__builtin_ctzll(ARM_HWCAP2_A64_SME_F8F32 )] = "smef8f32",
1049 [__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP4 )] = "smesf8dp4",
1050 [__builtin_ctzll(ARM_HWCAP2_A64_SME_SF8DP2 )] = "smesf8dp2",
1051 [__builtin_ctzll(ARM_HWCAP2_A64_POE )] = "poe",
1052 };
1053
1054 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
1055 }
1056
1057 #undef GET_FEATURE_ID
1058
1059 #if TARGET_BIG_ENDIAN
1060 # define VDSO_HEADER "vdso-be.c.inc"
1061 #else
1062 # define VDSO_HEADER "vdso-le.c.inc"
1063 #endif
1064
1065 #endif /* not TARGET_AARCH64 */
1066
1067 #endif /* TARGET_ARM */
1068
1069 #ifdef TARGET_SPARC
1070
1071 #ifndef TARGET_SPARC64
1072 # define ELF_CLASS ELFCLASS32
1073 # define ELF_ARCH EM_SPARC
1074 #elif defined(TARGET_ABI32)
1075 # define ELF_CLASS ELFCLASS32
1076 # define elf_check_arch(x) ((x) == EM_SPARC32PLUS || (x) == EM_SPARC)
1077 #else
1078 # define ELF_CLASS ELFCLASS64
1079 # define ELF_ARCH EM_SPARCV9
1080 #endif
1081
1082 #include "elf.h"
1083
1084 #define ELF_HWCAP get_elf_hwcap()
1085
get_elf_hwcap(void)1086 static uint32_t get_elf_hwcap(void)
1087 {
1088 /* There are not many sparc32 hwcap bits -- we have all of them. */
1089 uint32_t r = HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
1090 HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV;
1091
1092 #ifdef TARGET_SPARC64
1093 CPUSPARCState *env = cpu_env(thread_cpu);
1094 uint32_t features = env->def.features;
1095
1096 r |= HWCAP_SPARC_V9 | HWCAP_SPARC_V8PLUS;
1097 /* 32x32 multiply and divide are efficient. */
1098 r |= HWCAP_SPARC_MUL32 | HWCAP_SPARC_DIV32;
1099 /* We don't have an internal feature bit for this. */
1100 r |= HWCAP_SPARC_POPC;
1101 r |= features & CPU_FEATURE_FSMULD ? HWCAP_SPARC_FSMULD : 0;
1102 r |= features & CPU_FEATURE_VIS1 ? HWCAP_SPARC_VIS : 0;
1103 r |= features & CPU_FEATURE_VIS2 ? HWCAP_SPARC_VIS2 : 0;
1104 r |= features & CPU_FEATURE_FMAF ? HWCAP_SPARC_FMAF : 0;
1105 r |= features & CPU_FEATURE_VIS3 ? HWCAP_SPARC_VIS3 : 0;
1106 r |= features & CPU_FEATURE_IMA ? HWCAP_SPARC_IMA : 0;
1107 #endif
1108
1109 return r;
1110 }
1111
init_thread(struct target_pt_regs * regs,struct image_info * infop)1112 static inline void init_thread(struct target_pt_regs *regs,
1113 struct image_info *infop)
1114 {
1115 /* Note that target_cpu_copy_regs does not read psr/tstate. */
1116 regs->pc = infop->entry;
1117 regs->npc = regs->pc + 4;
1118 regs->y = 0;
1119 regs->u_regs[14] = (infop->start_stack - 16 * sizeof(abi_ulong)
1120 - TARGET_STACK_BIAS);
1121 }
1122 #endif /* TARGET_SPARC */
1123
1124 #ifdef TARGET_PPC
1125
1126 #define ELF_MACHINE PPC_ELF_MACHINE
1127
1128 #if defined(TARGET_PPC64)
1129
1130 #define elf_check_arch(x) ( (x) == EM_PPC64 )
1131
1132 #define ELF_CLASS ELFCLASS64
1133
1134 #else
1135
1136 #define ELF_CLASS ELFCLASS32
1137 #define EXSTACK_DEFAULT true
1138
1139 #endif
1140
1141 #define ELF_ARCH EM_PPC
1142
1143 /* Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
1144 See arch/powerpc/include/asm/cputable.h. */
1145 enum {
1146 QEMU_PPC_FEATURE_32 = 0x80000000,
1147 QEMU_PPC_FEATURE_64 = 0x40000000,
1148 QEMU_PPC_FEATURE_601_INSTR = 0x20000000,
1149 QEMU_PPC_FEATURE_HAS_ALTIVEC = 0x10000000,
1150 QEMU_PPC_FEATURE_HAS_FPU = 0x08000000,
1151 QEMU_PPC_FEATURE_HAS_MMU = 0x04000000,
1152 QEMU_PPC_FEATURE_HAS_4xxMAC = 0x02000000,
1153 QEMU_PPC_FEATURE_UNIFIED_CACHE = 0x01000000,
1154 QEMU_PPC_FEATURE_HAS_SPE = 0x00800000,
1155 QEMU_PPC_FEATURE_HAS_EFP_SINGLE = 0x00400000,
1156 QEMU_PPC_FEATURE_HAS_EFP_DOUBLE = 0x00200000,
1157 QEMU_PPC_FEATURE_NO_TB = 0x00100000,
1158 QEMU_PPC_FEATURE_POWER4 = 0x00080000,
1159 QEMU_PPC_FEATURE_POWER5 = 0x00040000,
1160 QEMU_PPC_FEATURE_POWER5_PLUS = 0x00020000,
1161 QEMU_PPC_FEATURE_CELL = 0x00010000,
1162 QEMU_PPC_FEATURE_BOOKE = 0x00008000,
1163 QEMU_PPC_FEATURE_SMT = 0x00004000,
1164 QEMU_PPC_FEATURE_ICACHE_SNOOP = 0x00002000,
1165 QEMU_PPC_FEATURE_ARCH_2_05 = 0x00001000,
1166 QEMU_PPC_FEATURE_PA6T = 0x00000800,
1167 QEMU_PPC_FEATURE_HAS_DFP = 0x00000400,
1168 QEMU_PPC_FEATURE_POWER6_EXT = 0x00000200,
1169 QEMU_PPC_FEATURE_ARCH_2_06 = 0x00000100,
1170 QEMU_PPC_FEATURE_HAS_VSX = 0x00000080,
1171 QEMU_PPC_FEATURE_PSERIES_PERFMON_COMPAT = 0x00000040,
1172
1173 QEMU_PPC_FEATURE_TRUE_LE = 0x00000002,
1174 QEMU_PPC_FEATURE_PPC_LE = 0x00000001,
1175
1176 /* Feature definitions in AT_HWCAP2. */
1177 QEMU_PPC_FEATURE2_ARCH_2_07 = 0x80000000, /* ISA 2.07 */
1178 QEMU_PPC_FEATURE2_HAS_HTM = 0x40000000, /* Hardware Transactional Memory */
1179 QEMU_PPC_FEATURE2_HAS_DSCR = 0x20000000, /* Data Stream Control Register */
1180 QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */
1181 QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */
1182 QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */
1183 QEMU_PPC_FEATURE2_VEC_CRYPTO = 0x02000000,
1184 QEMU_PPC_FEATURE2_HTM_NOSC = 0x01000000,
1185 QEMU_PPC_FEATURE2_ARCH_3_00 = 0x00800000, /* ISA 3.00 */
1186 QEMU_PPC_FEATURE2_HAS_IEEE128 = 0x00400000, /* VSX IEEE Bin Float 128-bit */
1187 QEMU_PPC_FEATURE2_DARN = 0x00200000, /* darn random number insn */
1188 QEMU_PPC_FEATURE2_SCV = 0x00100000, /* scv syscall */
1189 QEMU_PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000, /* TM w/o suspended state */
1190 QEMU_PPC_FEATURE2_ARCH_3_1 = 0x00040000, /* ISA 3.1 */
1191 QEMU_PPC_FEATURE2_MMA = 0x00020000, /* Matrix-Multiply Assist */
1192 };
1193
1194 #define ELF_HWCAP get_elf_hwcap()
1195
get_elf_hwcap(void)1196 static uint32_t get_elf_hwcap(void)
1197 {
1198 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
1199 uint32_t features = 0;
1200
1201 /* We don't have to be terribly complete here; the high points are
1202 Altivec/FP/SPE support. Anything else is just a bonus. */
1203 #define GET_FEATURE(flag, feature) \
1204 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
1205 #define GET_FEATURE2(flags, feature) \
1206 do { \
1207 if ((cpu->env.insns_flags2 & flags) == flags) { \
1208 features |= feature; \
1209 } \
1210 } while (0)
1211 GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64);
1212 GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU);
1213 GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC);
1214 GET_FEATURE(PPC_SPE, QEMU_PPC_FEATURE_HAS_SPE);
1215 GET_FEATURE(PPC_SPE_SINGLE, QEMU_PPC_FEATURE_HAS_EFP_SINGLE);
1216 GET_FEATURE(PPC_SPE_DOUBLE, QEMU_PPC_FEATURE_HAS_EFP_DOUBLE);
1217 GET_FEATURE(PPC_BOOKE, QEMU_PPC_FEATURE_BOOKE);
1218 GET_FEATURE(PPC_405_MAC, QEMU_PPC_FEATURE_HAS_4xxMAC);
1219 GET_FEATURE2(PPC2_DFP, QEMU_PPC_FEATURE_HAS_DFP);
1220 GET_FEATURE2(PPC2_VSX, QEMU_PPC_FEATURE_HAS_VSX);
1221 GET_FEATURE2((PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 |
1222 PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206),
1223 QEMU_PPC_FEATURE_ARCH_2_06);
1224 #undef GET_FEATURE
1225 #undef GET_FEATURE2
1226
1227 return features;
1228 }
1229
1230 #define ELF_HWCAP2 get_elf_hwcap2()
1231
get_elf_hwcap2(void)1232 static uint32_t get_elf_hwcap2(void)
1233 {
1234 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
1235 uint32_t features = 0;
1236
1237 #define GET_FEATURE(flag, feature) \
1238 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
1239 #define GET_FEATURE2(flag, feature) \
1240 do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0)
1241
1242 GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL);
1243 GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR);
1244 GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
1245 PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 |
1246 QEMU_PPC_FEATURE2_VEC_CRYPTO);
1247 GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 |
1248 QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128);
1249 GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 |
1250 QEMU_PPC_FEATURE2_MMA);
1251
1252 #undef GET_FEATURE
1253 #undef GET_FEATURE2
1254
1255 return features;
1256 }
1257
1258 /*
1259 * The requirements here are:
1260 * - keep the final alignment of sp (sp & 0xf)
1261 * - make sure the 32-bit value at the first 16 byte aligned position of
1262 * AUXV is greater than 16 for glibc compatibility.
1263 * AT_IGNOREPPC is used for that.
1264 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
1265 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
1266 */
1267 #define DLINFO_ARCH_ITEMS 5
1268 #define ARCH_DLINFO \
1269 do { \
1270 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu); \
1271 /* \
1272 * Handle glibc compatibility: these magic entries must \
1273 * be at the lowest addresses in the final auxv. \
1274 */ \
1275 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
1276 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
1277 NEW_AUX_ENT(AT_DCACHEBSIZE, cpu->env.dcache_line_size); \
1278 NEW_AUX_ENT(AT_ICACHEBSIZE, cpu->env.icache_line_size); \
1279 NEW_AUX_ENT(AT_UCACHEBSIZE, 0); \
1280 } while (0)
1281
init_thread(struct target_pt_regs * _regs,struct image_info * infop)1282 static inline void init_thread(struct target_pt_regs *_regs, struct image_info *infop)
1283 {
1284 _regs->gpr[1] = infop->start_stack;
1285 #if defined(TARGET_PPC64)
1286 if (get_ppc64_abi(infop) < 2) {
1287 uint64_t val;
1288 get_user_u64(val, infop->entry + 8);
1289 _regs->gpr[2] = val + infop->load_bias;
1290 get_user_u64(val, infop->entry);
1291 infop->entry = val + infop->load_bias;
1292 } else {
1293 _regs->gpr[12] = infop->entry; /* r12 set to global entry address */
1294 }
1295 #endif
1296 _regs->nip = infop->entry;
1297 }
1298
1299 /* See linux kernel: arch/powerpc/include/asm/elf.h. */
1300 #define ELF_NREG 48
1301 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1302
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUPPCState * env)1303 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUPPCState *env)
1304 {
1305 int i;
1306 target_ulong ccr = 0;
1307
1308 for (i = 0; i < ARRAY_SIZE(env->gpr); i++) {
1309 (*regs)[i] = tswapreg(env->gpr[i]);
1310 }
1311
1312 (*regs)[32] = tswapreg(env->nip);
1313 (*regs)[33] = tswapreg(env->msr);
1314 (*regs)[35] = tswapreg(env->ctr);
1315 (*regs)[36] = tswapreg(env->lr);
1316 (*regs)[37] = tswapreg(cpu_read_xer(env));
1317
1318 ccr = ppc_get_cr(env);
1319 (*regs)[38] = tswapreg(ccr);
1320 }
1321
1322 #define USE_ELF_CORE_DUMP
1323 #define ELF_EXEC_PAGESIZE 4096
1324
1325 #ifndef TARGET_PPC64
1326 # define VDSO_HEADER "vdso-32.c.inc"
1327 #elif TARGET_BIG_ENDIAN
1328 # define VDSO_HEADER "vdso-64.c.inc"
1329 #else
1330 # define VDSO_HEADER "vdso-64le.c.inc"
1331 #endif
1332
1333 #endif
1334
1335 #ifdef TARGET_LOONGARCH64
1336
1337 #define ELF_CLASS ELFCLASS64
1338 #define ELF_ARCH EM_LOONGARCH
1339 #define EXSTACK_DEFAULT true
1340
1341 #define elf_check_arch(x) ((x) == EM_LOONGARCH)
1342
1343 #define VDSO_HEADER "vdso.c.inc"
1344
init_thread(struct target_pt_regs * regs,struct image_info * infop)1345 static inline void init_thread(struct target_pt_regs *regs,
1346 struct image_info *infop)
1347 {
1348 /*Set crmd PG,DA = 1,0 */
1349 regs->csr.crmd = 2 << 3;
1350 regs->csr.era = infop->entry;
1351 regs->regs[3] = infop->start_stack;
1352 }
1353
1354 /* See linux kernel: arch/loongarch/include/asm/elf.h */
1355 #define ELF_NREG 45
1356 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1357
1358 enum {
1359 TARGET_EF_R0 = 0,
1360 TARGET_EF_CSR_ERA = TARGET_EF_R0 + 33,
1361 TARGET_EF_CSR_BADV = TARGET_EF_R0 + 34,
1362 };
1363
elf_core_copy_regs(target_elf_gregset_t * regs,const CPULoongArchState * env)1364 static void elf_core_copy_regs(target_elf_gregset_t *regs,
1365 const CPULoongArchState *env)
1366 {
1367 int i;
1368
1369 (*regs)[TARGET_EF_R0] = 0;
1370
1371 for (i = 1; i < ARRAY_SIZE(env->gpr); i++) {
1372 (*regs)[TARGET_EF_R0 + i] = tswapreg(env->gpr[i]);
1373 }
1374
1375 (*regs)[TARGET_EF_CSR_ERA] = tswapreg(env->pc);
1376 (*regs)[TARGET_EF_CSR_BADV] = tswapreg(env->CSR_BADV);
1377 }
1378
1379 #define USE_ELF_CORE_DUMP
1380 #define ELF_EXEC_PAGESIZE 4096
1381
1382 #define ELF_HWCAP get_elf_hwcap()
1383
1384 /* See arch/loongarch/include/uapi/asm/hwcap.h */
1385 enum {
1386 HWCAP_LOONGARCH_CPUCFG = (1 << 0),
1387 HWCAP_LOONGARCH_LAM = (1 << 1),
1388 HWCAP_LOONGARCH_UAL = (1 << 2),
1389 HWCAP_LOONGARCH_FPU = (1 << 3),
1390 HWCAP_LOONGARCH_LSX = (1 << 4),
1391 HWCAP_LOONGARCH_LASX = (1 << 5),
1392 HWCAP_LOONGARCH_CRC32 = (1 << 6),
1393 HWCAP_LOONGARCH_COMPLEX = (1 << 7),
1394 HWCAP_LOONGARCH_CRYPTO = (1 << 8),
1395 HWCAP_LOONGARCH_LVZ = (1 << 9),
1396 HWCAP_LOONGARCH_LBT_X86 = (1 << 10),
1397 HWCAP_LOONGARCH_LBT_ARM = (1 << 11),
1398 HWCAP_LOONGARCH_LBT_MIPS = (1 << 12),
1399 };
1400
get_elf_hwcap(void)1401 static uint32_t get_elf_hwcap(void)
1402 {
1403 LoongArchCPU *cpu = LOONGARCH_CPU(thread_cpu);
1404 uint32_t hwcaps = 0;
1405
1406 hwcaps |= HWCAP_LOONGARCH_CRC32;
1407
1408 if (FIELD_EX32(cpu->env.cpucfg[1], CPUCFG1, UAL)) {
1409 hwcaps |= HWCAP_LOONGARCH_UAL;
1410 }
1411
1412 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, FP)) {
1413 hwcaps |= HWCAP_LOONGARCH_FPU;
1414 }
1415
1416 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LAM)) {
1417 hwcaps |= HWCAP_LOONGARCH_LAM;
1418 }
1419
1420 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
1421 hwcaps |= HWCAP_LOONGARCH_LSX;
1422 }
1423
1424 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
1425 hwcaps |= HWCAP_LOONGARCH_LASX;
1426 }
1427
1428 return hwcaps;
1429 }
1430
1431 #define ELF_PLATFORM "loongarch"
1432
1433 #endif /* TARGET_LOONGARCH64 */
1434
1435 #ifdef TARGET_MIPS
1436
1437 #ifdef TARGET_MIPS64
1438 #define ELF_CLASS ELFCLASS64
1439 #else
1440 #define ELF_CLASS ELFCLASS32
1441 #endif
1442 #define ELF_ARCH EM_MIPS
1443 #define EXSTACK_DEFAULT true
1444
1445 #ifdef TARGET_ABI_MIPSN32
1446 #define elf_check_abi(x) ((x) & EF_MIPS_ABI2)
1447 #else
1448 #define elf_check_abi(x) (!((x) & EF_MIPS_ABI2))
1449 #endif
1450
1451 #define ELF_BASE_PLATFORM get_elf_base_platform()
1452
1453 #define MATCH_PLATFORM_INSN(_flags, _base_platform) \
1454 do { if ((cpu->env.insn_flags & (_flags)) == _flags) \
1455 { return _base_platform; } } while (0)
1456
get_elf_base_platform(void)1457 static const char *get_elf_base_platform(void)
1458 {
1459 MIPSCPU *cpu = MIPS_CPU(thread_cpu);
1460
1461 /* 64 bit ISAs goes first */
1462 MATCH_PLATFORM_INSN(CPU_MIPS64R6, "mips64r6");
1463 MATCH_PLATFORM_INSN(CPU_MIPS64R5, "mips64r5");
1464 MATCH_PLATFORM_INSN(CPU_MIPS64R2, "mips64r2");
1465 MATCH_PLATFORM_INSN(CPU_MIPS64R1, "mips64");
1466 MATCH_PLATFORM_INSN(CPU_MIPS5, "mips5");
1467 MATCH_PLATFORM_INSN(CPU_MIPS4, "mips4");
1468 MATCH_PLATFORM_INSN(CPU_MIPS3, "mips3");
1469
1470 /* 32 bit ISAs */
1471 MATCH_PLATFORM_INSN(CPU_MIPS32R6, "mips32r6");
1472 MATCH_PLATFORM_INSN(CPU_MIPS32R5, "mips32r5");
1473 MATCH_PLATFORM_INSN(CPU_MIPS32R2, "mips32r2");
1474 MATCH_PLATFORM_INSN(CPU_MIPS32R1, "mips32");
1475 MATCH_PLATFORM_INSN(CPU_MIPS2, "mips2");
1476
1477 /* Fallback */
1478 return "mips";
1479 }
1480 #undef MATCH_PLATFORM_INSN
1481
init_thread(struct target_pt_regs * regs,struct image_info * infop)1482 static inline void init_thread(struct target_pt_regs *regs,
1483 struct image_info *infop)
1484 {
1485 regs->cp0_status = 2 << CP0St_KSU;
1486 regs->cp0_epc = infop->entry;
1487 regs->regs[29] = infop->start_stack;
1488 }
1489
1490 /* See linux kernel: arch/mips/include/asm/elf.h. */
1491 #define ELF_NREG 45
1492 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1493
1494 /* See linux kernel: arch/mips/include/asm/reg.h. */
1495 enum {
1496 #ifdef TARGET_MIPS64
1497 TARGET_EF_R0 = 0,
1498 #else
1499 TARGET_EF_R0 = 6,
1500 #endif
1501 TARGET_EF_R26 = TARGET_EF_R0 + 26,
1502 TARGET_EF_R27 = TARGET_EF_R0 + 27,
1503 TARGET_EF_LO = TARGET_EF_R0 + 32,
1504 TARGET_EF_HI = TARGET_EF_R0 + 33,
1505 TARGET_EF_CP0_EPC = TARGET_EF_R0 + 34,
1506 TARGET_EF_CP0_BADVADDR = TARGET_EF_R0 + 35,
1507 TARGET_EF_CP0_STATUS = TARGET_EF_R0 + 36,
1508 TARGET_EF_CP0_CAUSE = TARGET_EF_R0 + 37
1509 };
1510
1511 /* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUMIPSState * env)1512 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMIPSState *env)
1513 {
1514 int i;
1515
1516 for (i = 0; i < TARGET_EF_R0; i++) {
1517 (*regs)[i] = 0;
1518 }
1519 (*regs)[TARGET_EF_R0] = 0;
1520
1521 for (i = 1; i < ARRAY_SIZE(env->active_tc.gpr); i++) {
1522 (*regs)[TARGET_EF_R0 + i] = tswapreg(env->active_tc.gpr[i]);
1523 }
1524
1525 (*regs)[TARGET_EF_R26] = 0;
1526 (*regs)[TARGET_EF_R27] = 0;
1527 (*regs)[TARGET_EF_LO] = tswapreg(env->active_tc.LO[0]);
1528 (*regs)[TARGET_EF_HI] = tswapreg(env->active_tc.HI[0]);
1529 (*regs)[TARGET_EF_CP0_EPC] = tswapreg(env->active_tc.PC);
1530 (*regs)[TARGET_EF_CP0_BADVADDR] = tswapreg(env->CP0_BadVAddr);
1531 (*regs)[TARGET_EF_CP0_STATUS] = tswapreg(env->CP0_Status);
1532 (*regs)[TARGET_EF_CP0_CAUSE] = tswapreg(env->CP0_Cause);
1533 }
1534
1535 #define USE_ELF_CORE_DUMP
1536 #define ELF_EXEC_PAGESIZE 4096
1537
1538 /* See arch/mips/include/uapi/asm/hwcap.h. */
1539 enum {
1540 HWCAP_MIPS_R6 = (1 << 0),
1541 HWCAP_MIPS_MSA = (1 << 1),
1542 HWCAP_MIPS_CRC32 = (1 << 2),
1543 HWCAP_MIPS_MIPS16 = (1 << 3),
1544 HWCAP_MIPS_MDMX = (1 << 4),
1545 HWCAP_MIPS_MIPS3D = (1 << 5),
1546 HWCAP_MIPS_SMARTMIPS = (1 << 6),
1547 HWCAP_MIPS_DSP = (1 << 7),
1548 HWCAP_MIPS_DSP2 = (1 << 8),
1549 HWCAP_MIPS_DSP3 = (1 << 9),
1550 HWCAP_MIPS_MIPS16E2 = (1 << 10),
1551 HWCAP_LOONGSON_MMI = (1 << 11),
1552 HWCAP_LOONGSON_EXT = (1 << 12),
1553 HWCAP_LOONGSON_EXT2 = (1 << 13),
1554 HWCAP_LOONGSON_CPUCFG = (1 << 14),
1555 };
1556
1557 #define ELF_HWCAP get_elf_hwcap()
1558
1559 #define GET_FEATURE_INSN(_flag, _hwcap) \
1560 do { if (cpu->env.insn_flags & (_flag)) { hwcaps |= _hwcap; } } while (0)
1561
1562 #define GET_FEATURE_REG_SET(_reg, _mask, _hwcap) \
1563 do { if (cpu->env._reg & (_mask)) { hwcaps |= _hwcap; } } while (0)
1564
1565 #define GET_FEATURE_REG_EQU(_reg, _start, _length, _val, _hwcap) \
1566 do { \
1567 if (extract32(cpu->env._reg, (_start), (_length)) == (_val)) { \
1568 hwcaps |= _hwcap; \
1569 } \
1570 } while (0)
1571
get_elf_hwcap(void)1572 static uint32_t get_elf_hwcap(void)
1573 {
1574 MIPSCPU *cpu = MIPS_CPU(thread_cpu);
1575 uint32_t hwcaps = 0;
1576
1577 GET_FEATURE_REG_EQU(CP0_Config0, CP0C0_AR, CP0C0_AR_LENGTH,
1578 2, HWCAP_MIPS_R6);
1579 GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA);
1580 GET_FEATURE_INSN(ASE_LMMI, HWCAP_LOONGSON_MMI);
1581 GET_FEATURE_INSN(ASE_LEXT, HWCAP_LOONGSON_EXT);
1582
1583 return hwcaps;
1584 }
1585
1586 #undef GET_FEATURE_REG_EQU
1587 #undef GET_FEATURE_REG_SET
1588 #undef GET_FEATURE_INSN
1589
1590 #endif /* TARGET_MIPS */
1591
1592 #ifdef TARGET_MICROBLAZE
1593
1594 #define elf_check_arch(x) ( (x) == EM_MICROBLAZE || (x) == EM_MICROBLAZE_OLD)
1595
1596 #define ELF_CLASS ELFCLASS32
1597 #define ELF_ARCH EM_MICROBLAZE
1598
init_thread(struct target_pt_regs * regs,struct image_info * infop)1599 static inline void init_thread(struct target_pt_regs *regs,
1600 struct image_info *infop)
1601 {
1602 regs->pc = infop->entry;
1603 regs->r1 = infop->start_stack;
1604
1605 }
1606
1607 #define ELF_EXEC_PAGESIZE 4096
1608
1609 #define USE_ELF_CORE_DUMP
1610 #define ELF_NREG 38
1611 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1612
1613 /* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUMBState * env)1614 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMBState *env)
1615 {
1616 int i, pos = 0;
1617
1618 for (i = 0; i < 32; i++) {
1619 (*regs)[pos++] = tswapreg(env->regs[i]);
1620 }
1621
1622 (*regs)[pos++] = tswapreg(env->pc);
1623 (*regs)[pos++] = tswapreg(mb_cpu_read_msr(env));
1624 (*regs)[pos++] = 0;
1625 (*regs)[pos++] = tswapreg(env->ear);
1626 (*regs)[pos++] = 0;
1627 (*regs)[pos++] = tswapreg(env->esr);
1628 }
1629
1630 #endif /* TARGET_MICROBLAZE */
1631
1632 #ifdef TARGET_OPENRISC
1633
1634 #define ELF_ARCH EM_OPENRISC
1635 #define ELF_CLASS ELFCLASS32
1636 #define ELF_DATA ELFDATA2MSB
1637
init_thread(struct target_pt_regs * regs,struct image_info * infop)1638 static inline void init_thread(struct target_pt_regs *regs,
1639 struct image_info *infop)
1640 {
1641 regs->pc = infop->entry;
1642 regs->gpr[1] = infop->start_stack;
1643 }
1644
1645 #define USE_ELF_CORE_DUMP
1646 #define ELF_EXEC_PAGESIZE 8192
1647
1648 /* See linux kernel arch/openrisc/include/asm/elf.h. */
1649 #define ELF_NREG 34 /* gprs and pc, sr */
1650 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1651
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUOpenRISCState * env)1652 static void elf_core_copy_regs(target_elf_gregset_t *regs,
1653 const CPUOpenRISCState *env)
1654 {
1655 int i;
1656
1657 for (i = 0; i < 32; i++) {
1658 (*regs)[i] = tswapreg(cpu_get_gpr(env, i));
1659 }
1660 (*regs)[32] = tswapreg(env->pc);
1661 (*regs)[33] = tswapreg(cpu_get_sr(env));
1662 }
1663 #define ELF_HWCAP 0
1664 #define ELF_PLATFORM NULL
1665
1666 #endif /* TARGET_OPENRISC */
1667
1668 #ifdef TARGET_SH4
1669
1670 #define ELF_CLASS ELFCLASS32
1671 #define ELF_ARCH EM_SH
1672
init_thread(struct target_pt_regs * regs,struct image_info * infop)1673 static inline void init_thread(struct target_pt_regs *regs,
1674 struct image_info *infop)
1675 {
1676 /* Check other registers XXXXX */
1677 regs->pc = infop->entry;
1678 regs->regs[15] = infop->start_stack;
1679 }
1680
1681 /* See linux kernel: arch/sh/include/asm/elf.h. */
1682 #define ELF_NREG 23
1683 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1684
1685 /* See linux kernel: arch/sh/include/asm/ptrace.h. */
1686 enum {
1687 TARGET_REG_PC = 16,
1688 TARGET_REG_PR = 17,
1689 TARGET_REG_SR = 18,
1690 TARGET_REG_GBR = 19,
1691 TARGET_REG_MACH = 20,
1692 TARGET_REG_MACL = 21,
1693 TARGET_REG_SYSCALL = 22
1694 };
1695
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUSH4State * env)1696 static inline void elf_core_copy_regs(target_elf_gregset_t *regs,
1697 const CPUSH4State *env)
1698 {
1699 int i;
1700
1701 for (i = 0; i < 16; i++) {
1702 (*regs)[i] = tswapreg(env->gregs[i]);
1703 }
1704
1705 (*regs)[TARGET_REG_PC] = tswapreg(env->pc);
1706 (*regs)[TARGET_REG_PR] = tswapreg(env->pr);
1707 (*regs)[TARGET_REG_SR] = tswapreg(env->sr);
1708 (*regs)[TARGET_REG_GBR] = tswapreg(env->gbr);
1709 (*regs)[TARGET_REG_MACH] = tswapreg(env->mach);
1710 (*regs)[TARGET_REG_MACL] = tswapreg(env->macl);
1711 (*regs)[TARGET_REG_SYSCALL] = 0; /* FIXME */
1712 }
1713
1714 #define USE_ELF_CORE_DUMP
1715 #define ELF_EXEC_PAGESIZE 4096
1716
1717 enum {
1718 SH_CPU_HAS_FPU = 0x0001, /* Hardware FPU support */
1719 SH_CPU_HAS_P2_FLUSH_BUG = 0x0002, /* Need to flush the cache in P2 area */
1720 SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */
1721 SH_CPU_HAS_DSP = 0x0008, /* SH-DSP: DSP support */
1722 SH_CPU_HAS_PERF_COUNTER = 0x0010, /* Hardware performance counters */
1723 SH_CPU_HAS_PTEA = 0x0020, /* PTEA register */
1724 SH_CPU_HAS_LLSC = 0x0040, /* movli.l/movco.l */
1725 SH_CPU_HAS_L2_CACHE = 0x0080, /* Secondary cache / URAM */
1726 SH_CPU_HAS_OP32 = 0x0100, /* 32-bit instruction support */
1727 SH_CPU_HAS_PTEAEX = 0x0200, /* PTE ASID Extension support */
1728 };
1729
1730 #define ELF_HWCAP get_elf_hwcap()
1731
get_elf_hwcap(void)1732 static uint32_t get_elf_hwcap(void)
1733 {
1734 SuperHCPU *cpu = SUPERH_CPU(thread_cpu);
1735 uint32_t hwcap = 0;
1736
1737 hwcap |= SH_CPU_HAS_FPU;
1738
1739 if (cpu->env.features & SH_FEATURE_SH4A) {
1740 hwcap |= SH_CPU_HAS_LLSC;
1741 }
1742
1743 return hwcap;
1744 }
1745
1746 #endif
1747
1748 #ifdef TARGET_M68K
1749
1750 #define ELF_CLASS ELFCLASS32
1751 #define ELF_ARCH EM_68K
1752
1753 /* ??? Does this need to do anything?
1754 #define ELF_PLAT_INIT(_r) */
1755
init_thread(struct target_pt_regs * regs,struct image_info * infop)1756 static inline void init_thread(struct target_pt_regs *regs,
1757 struct image_info *infop)
1758 {
1759 regs->usp = infop->start_stack;
1760 regs->sr = 0;
1761 regs->pc = infop->entry;
1762 }
1763
1764 /* See linux kernel: arch/m68k/include/asm/elf.h. */
1765 #define ELF_NREG 20
1766 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1767
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUM68KState * env)1768 static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUM68KState *env)
1769 {
1770 (*regs)[0] = tswapreg(env->dregs[1]);
1771 (*regs)[1] = tswapreg(env->dregs[2]);
1772 (*regs)[2] = tswapreg(env->dregs[3]);
1773 (*regs)[3] = tswapreg(env->dregs[4]);
1774 (*regs)[4] = tswapreg(env->dregs[5]);
1775 (*regs)[5] = tswapreg(env->dregs[6]);
1776 (*regs)[6] = tswapreg(env->dregs[7]);
1777 (*regs)[7] = tswapreg(env->aregs[0]);
1778 (*regs)[8] = tswapreg(env->aregs[1]);
1779 (*regs)[9] = tswapreg(env->aregs[2]);
1780 (*regs)[10] = tswapreg(env->aregs[3]);
1781 (*regs)[11] = tswapreg(env->aregs[4]);
1782 (*regs)[12] = tswapreg(env->aregs[5]);
1783 (*regs)[13] = tswapreg(env->aregs[6]);
1784 (*regs)[14] = tswapreg(env->dregs[0]);
1785 (*regs)[15] = tswapreg(env->aregs[7]);
1786 (*regs)[16] = tswapreg(env->dregs[0]); /* FIXME: orig_d0 */
1787 (*regs)[17] = tswapreg(env->sr);
1788 (*regs)[18] = tswapreg(env->pc);
1789 (*regs)[19] = 0; /* FIXME: regs->format | regs->vector */
1790 }
1791
1792 #define USE_ELF_CORE_DUMP
1793 #define ELF_EXEC_PAGESIZE 8192
1794
1795 #endif
1796
1797 #ifdef TARGET_ALPHA
1798
1799 #define ELF_CLASS ELFCLASS64
1800 #define ELF_ARCH EM_ALPHA
1801
init_thread(struct target_pt_regs * regs,struct image_info * infop)1802 static inline void init_thread(struct target_pt_regs *regs,
1803 struct image_info *infop)
1804 {
1805 regs->pc = infop->entry;
1806 regs->ps = 8;
1807 regs->usp = infop->start_stack;
1808 }
1809
1810 #define ELF_EXEC_PAGESIZE 8192
1811
1812 #endif /* TARGET_ALPHA */
1813
1814 #ifdef TARGET_S390X
1815
1816 #define ELF_CLASS ELFCLASS64
1817 #define ELF_DATA ELFDATA2MSB
1818 #define ELF_ARCH EM_S390
1819
1820 #include "elf.h"
1821
1822 #define ELF_HWCAP get_elf_hwcap()
1823
1824 #define GET_FEATURE(_feat, _hwcap) \
1825 do { if (s390_has_feat(_feat)) { hwcap |= _hwcap; } } while (0)
1826
get_elf_hwcap(void)1827 uint32_t get_elf_hwcap(void)
1828 {
1829 /*
1830 * Let's assume we always have esan3 and zarch.
1831 * 31-bit processes can use 64-bit registers (high gprs).
1832 */
1833 uint32_t hwcap = HWCAP_S390_ESAN3 | HWCAP_S390_ZARCH | HWCAP_S390_HIGH_GPRS;
1834
1835 GET_FEATURE(S390_FEAT_STFLE, HWCAP_S390_STFLE);
1836 GET_FEATURE(S390_FEAT_MSA, HWCAP_S390_MSA);
1837 GET_FEATURE(S390_FEAT_LONG_DISPLACEMENT, HWCAP_S390_LDISP);
1838 GET_FEATURE(S390_FEAT_EXTENDED_IMMEDIATE, HWCAP_S390_EIMM);
1839 if (s390_has_feat(S390_FEAT_EXTENDED_TRANSLATION_3) &&
1840 s390_has_feat(S390_FEAT_ETF3_ENH)) {
1841 hwcap |= HWCAP_S390_ETF3EH;
1842 }
1843 GET_FEATURE(S390_FEAT_VECTOR, HWCAP_S390_VXRS);
1844 GET_FEATURE(S390_FEAT_VECTOR_ENH, HWCAP_S390_VXRS_EXT);
1845 GET_FEATURE(S390_FEAT_VECTOR_ENH2, HWCAP_S390_VXRS_EXT2);
1846
1847 return hwcap;
1848 }
1849
elf_hwcap_str(uint32_t bit)1850 const char *elf_hwcap_str(uint32_t bit)
1851 {
1852 static const char *hwcap_str[] = {
1853 [HWCAP_S390_NR_ESAN3] = "esan3",
1854 [HWCAP_S390_NR_ZARCH] = "zarch",
1855 [HWCAP_S390_NR_STFLE] = "stfle",
1856 [HWCAP_S390_NR_MSA] = "msa",
1857 [HWCAP_S390_NR_LDISP] = "ldisp",
1858 [HWCAP_S390_NR_EIMM] = "eimm",
1859 [HWCAP_S390_NR_DFP] = "dfp",
1860 [HWCAP_S390_NR_HPAGE] = "edat",
1861 [HWCAP_S390_NR_ETF3EH] = "etf3eh",
1862 [HWCAP_S390_NR_HIGH_GPRS] = "highgprs",
1863 [HWCAP_S390_NR_TE] = "te",
1864 [HWCAP_S390_NR_VXRS] = "vx",
1865 [HWCAP_S390_NR_VXRS_BCD] = "vxd",
1866 [HWCAP_S390_NR_VXRS_EXT] = "vxe",
1867 [HWCAP_S390_NR_GS] = "gs",
1868 [HWCAP_S390_NR_VXRS_EXT2] = "vxe2",
1869 [HWCAP_S390_NR_VXRS_PDE] = "vxp",
1870 [HWCAP_S390_NR_SORT] = "sort",
1871 [HWCAP_S390_NR_DFLT] = "dflt",
1872 [HWCAP_S390_NR_NNPA] = "nnpa",
1873 [HWCAP_S390_NR_PCI_MIO] = "pcimio",
1874 [HWCAP_S390_NR_SIE] = "sie",
1875 };
1876
1877 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
1878 }
1879
init_thread(struct target_pt_regs * regs,struct image_info * infop)1880 static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
1881 {
1882 regs->psw.addr = infop->entry;
1883 regs->psw.mask = PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
1884 PSW_MASK_MCHECK | PSW_MASK_PSTATE | PSW_MASK_64 | \
1885 PSW_MASK_32;
1886 regs->gprs[15] = infop->start_stack;
1887 }
1888
1889 /* See linux kernel: arch/s390/include/uapi/asm/ptrace.h (s390_regs). */
1890 #define ELF_NREG 27
1891 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1892
1893 enum {
1894 TARGET_REG_PSWM = 0,
1895 TARGET_REG_PSWA = 1,
1896 TARGET_REG_GPRS = 2,
1897 TARGET_REG_ARS = 18,
1898 TARGET_REG_ORIG_R2 = 26,
1899 };
1900
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUS390XState * env)1901 static void elf_core_copy_regs(target_elf_gregset_t *regs,
1902 const CPUS390XState *env)
1903 {
1904 int i;
1905 uint32_t *aregs;
1906
1907 (*regs)[TARGET_REG_PSWM] = tswapreg(env->psw.mask);
1908 (*regs)[TARGET_REG_PSWA] = tswapreg(env->psw.addr);
1909 for (i = 0; i < 16; i++) {
1910 (*regs)[TARGET_REG_GPRS + i] = tswapreg(env->regs[i]);
1911 }
1912 aregs = (uint32_t *)&((*regs)[TARGET_REG_ARS]);
1913 for (i = 0; i < 16; i++) {
1914 aregs[i] = tswap32(env->aregs[i]);
1915 }
1916 (*regs)[TARGET_REG_ORIG_R2] = 0;
1917 }
1918
1919 #define USE_ELF_CORE_DUMP
1920 #define ELF_EXEC_PAGESIZE 4096
1921
1922 #define VDSO_HEADER "vdso.c.inc"
1923
1924 #endif /* TARGET_S390X */
1925
1926 #ifdef TARGET_RISCV
1927
1928 #define ELF_ARCH EM_RISCV
1929
1930 #ifdef TARGET_RISCV32
1931 #define ELF_CLASS ELFCLASS32
1932 #define VDSO_HEADER "vdso-32.c.inc"
1933 #else
1934 #define ELF_CLASS ELFCLASS64
1935 #define VDSO_HEADER "vdso-64.c.inc"
1936 #endif
1937
1938 #define ELF_HWCAP get_elf_hwcap()
1939
get_elf_hwcap(void)1940 static uint32_t get_elf_hwcap(void)
1941 {
1942 #define MISA_BIT(EXT) (1 << (EXT - 'A'))
1943 RISCVCPU *cpu = RISCV_CPU(thread_cpu);
1944 uint32_t mask = MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A')
1945 | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C')
1946 | MISA_BIT('V');
1947
1948 return cpu->env.misa_ext & mask;
1949 #undef MISA_BIT
1950 }
1951
init_thread(struct target_pt_regs * regs,struct image_info * infop)1952 static inline void init_thread(struct target_pt_regs *regs,
1953 struct image_info *infop)
1954 {
1955 regs->sepc = infop->entry;
1956 regs->sp = infop->start_stack;
1957 }
1958
1959 #define ELF_EXEC_PAGESIZE 4096
1960
1961 #endif /* TARGET_RISCV */
1962
1963 #ifdef TARGET_HPPA
1964
1965 #define ELF_CLASS ELFCLASS32
1966 #define ELF_ARCH EM_PARISC
1967 #define ELF_PLATFORM "PARISC"
1968 #define STACK_GROWS_DOWN 0
1969 #define STACK_ALIGNMENT 64
1970
1971 #define VDSO_HEADER "vdso.c.inc"
1972
init_thread(struct target_pt_regs * regs,struct image_info * infop)1973 static inline void init_thread(struct target_pt_regs *regs,
1974 struct image_info *infop)
1975 {
1976 regs->iaoq[0] = infop->entry | PRIV_USER;
1977 regs->iaoq[1] = regs->iaoq[0] + 4;
1978 regs->gr[23] = 0;
1979 regs->gr[24] = infop->argv;
1980 regs->gr[25] = infop->argc;
1981 /* The top-of-stack contains a linkage buffer. */
1982 regs->gr[30] = infop->start_stack + 64;
1983 regs->gr[31] = infop->entry;
1984 }
1985
1986 #define LO_COMMPAGE 0
1987
init_guest_commpage(void)1988 static bool init_guest_commpage(void)
1989 {
1990 /* If reserved_va, then we have already mapped 0 page on the host. */
1991 if (!reserved_va) {
1992 void *want, *addr;
1993
1994 want = g2h_untagged(LO_COMMPAGE);
1995 addr = mmap(want, TARGET_PAGE_SIZE, PROT_NONE,
1996 MAP_ANONYMOUS | MAP_PRIVATE | MAP_FIXED_NOREPLACE, -1, 0);
1997 if (addr == MAP_FAILED) {
1998 perror("Allocating guest commpage");
1999 exit(EXIT_FAILURE);
2000 }
2001 if (addr != want) {
2002 return false;
2003 }
2004 }
2005
2006 /*
2007 * On Linux, page zero is normally marked execute only + gateway.
2008 * Normal read or write is supposed to fail (thus PROT_NONE above),
2009 * but specific offsets have kernel code mapped to raise permissions
2010 * and implement syscalls. Here, simply mark the page executable.
2011 * Special case the entry points during translation (see do_page_zero).
2012 */
2013 page_set_flags(LO_COMMPAGE, LO_COMMPAGE | ~TARGET_PAGE_MASK,
2014 PAGE_EXEC | PAGE_VALID);
2015 return true;
2016 }
2017
2018 #endif /* TARGET_HPPA */
2019
2020 #ifdef TARGET_XTENSA
2021
2022 #define ELF_CLASS ELFCLASS32
2023 #define ELF_ARCH EM_XTENSA
2024
init_thread(struct target_pt_regs * regs,struct image_info * infop)2025 static inline void init_thread(struct target_pt_regs *regs,
2026 struct image_info *infop)
2027 {
2028 regs->windowbase = 0;
2029 regs->windowstart = 1;
2030 regs->areg[1] = infop->start_stack;
2031 regs->pc = infop->entry;
2032 if (info_is_fdpic(infop)) {
2033 regs->areg[4] = infop->loadmap_addr;
2034 regs->areg[5] = infop->interpreter_loadmap_addr;
2035 if (infop->interpreter_loadmap_addr) {
2036 regs->areg[6] = infop->interpreter_pt_dynamic_addr;
2037 } else {
2038 regs->areg[6] = infop->pt_dynamic_addr;
2039 }
2040 }
2041 }
2042
2043 /* See linux kernel: arch/xtensa/include/asm/elf.h. */
2044 #define ELF_NREG 128
2045 typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
2046
2047 enum {
2048 TARGET_REG_PC,
2049 TARGET_REG_PS,
2050 TARGET_REG_LBEG,
2051 TARGET_REG_LEND,
2052 TARGET_REG_LCOUNT,
2053 TARGET_REG_SAR,
2054 TARGET_REG_WINDOWSTART,
2055 TARGET_REG_WINDOWBASE,
2056 TARGET_REG_THREADPTR,
2057 TARGET_REG_AR0 = 64,
2058 };
2059
elf_core_copy_regs(target_elf_gregset_t * regs,const CPUXtensaState * env)2060 static void elf_core_copy_regs(target_elf_gregset_t *regs,
2061 const CPUXtensaState *env)
2062 {
2063 unsigned i;
2064
2065 (*regs)[TARGET_REG_PC] = tswapreg(env->pc);
2066 (*regs)[TARGET_REG_PS] = tswapreg(env->sregs[PS] & ~PS_EXCM);
2067 (*regs)[TARGET_REG_LBEG] = tswapreg(env->sregs[LBEG]);
2068 (*regs)[TARGET_REG_LEND] = tswapreg(env->sregs[LEND]);
2069 (*regs)[TARGET_REG_LCOUNT] = tswapreg(env->sregs[LCOUNT]);
2070 (*regs)[TARGET_REG_SAR] = tswapreg(env->sregs[SAR]);
2071 (*regs)[TARGET_REG_WINDOWSTART] = tswapreg(env->sregs[WINDOW_START]);
2072 (*regs)[TARGET_REG_WINDOWBASE] = tswapreg(env->sregs[WINDOW_BASE]);
2073 (*regs)[TARGET_REG_THREADPTR] = tswapreg(env->uregs[THREADPTR]);
2074 xtensa_sync_phys_from_window((CPUXtensaState *)env);
2075 for (i = 0; i < env->config->nareg; ++i) {
2076 (*regs)[TARGET_REG_AR0 + i] = tswapreg(env->phys_regs[i]);
2077 }
2078 }
2079
2080 #define USE_ELF_CORE_DUMP
2081 #define ELF_EXEC_PAGESIZE 4096
2082
2083 #endif /* TARGET_XTENSA */
2084
2085 #ifdef TARGET_HEXAGON
2086
2087 #define ELF_CLASS ELFCLASS32
2088 #define ELF_ARCH EM_HEXAGON
2089
init_thread(struct target_pt_regs * regs,struct image_info * infop)2090 static inline void init_thread(struct target_pt_regs *regs,
2091 struct image_info *infop)
2092 {
2093 regs->sepc = infop->entry;
2094 regs->sp = infop->start_stack;
2095 }
2096
2097 #endif /* TARGET_HEXAGON */
2098
2099 #ifndef ELF_BASE_PLATFORM
2100 #define ELF_BASE_PLATFORM (NULL)
2101 #endif
2102
2103 #ifndef ELF_PLATFORM
2104 #define ELF_PLATFORM (NULL)
2105 #endif
2106
2107 #ifndef ELF_MACHINE
2108 #define ELF_MACHINE ELF_ARCH
2109 #endif
2110
2111 #ifndef elf_check_arch
2112 #define elf_check_arch(x) ((x) == ELF_ARCH)
2113 #endif
2114
2115 #ifndef elf_check_abi
2116 #define elf_check_abi(x) (1)
2117 #endif
2118
2119 #ifndef ELF_HWCAP
2120 #define ELF_HWCAP 0
2121 #endif
2122
2123 #ifndef STACK_GROWS_DOWN
2124 #define STACK_GROWS_DOWN 1
2125 #endif
2126
2127 #ifndef STACK_ALIGNMENT
2128 #define STACK_ALIGNMENT 16
2129 #endif
2130
2131 #ifdef TARGET_ABI32
2132 #undef ELF_CLASS
2133 #define ELF_CLASS ELFCLASS32
2134 #undef bswaptls
2135 #define bswaptls(ptr) bswap32s(ptr)
2136 #endif
2137
2138 #ifndef EXSTACK_DEFAULT
2139 #define EXSTACK_DEFAULT false
2140 #endif
2141
2142 #include "elf.h"
2143
2144 /* We must delay the following stanzas until after "elf.h". */
2145 #if defined(TARGET_AARCH64)
2146
arch_parse_elf_property(uint32_t pr_type,uint32_t pr_datasz,const uint32_t * data,struct image_info * info,Error ** errp)2147 static bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz,
2148 const uint32_t *data,
2149 struct image_info *info,
2150 Error **errp)
2151 {
2152 if (pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND) {
2153 if (pr_datasz != sizeof(uint32_t)) {
2154 error_setg(errp, "Ill-formed GNU_PROPERTY_AARCH64_FEATURE_1_AND");
2155 return false;
2156 }
2157 /* We will extract GNU_PROPERTY_AARCH64_FEATURE_1_BTI later. */
2158 info->note_flags = *data;
2159 }
2160 return true;
2161 }
2162 #define ARCH_USE_GNU_PROPERTY 1
2163
2164 #else
2165
arch_parse_elf_property(uint32_t pr_type,uint32_t pr_datasz,const uint32_t * data,struct image_info * info,Error ** errp)2166 static bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz,
2167 const uint32_t *data,
2168 struct image_info *info,
2169 Error **errp)
2170 {
2171 g_assert_not_reached();
2172 }
2173 #define ARCH_USE_GNU_PROPERTY 0
2174
2175 #endif
2176
2177 struct exec
2178 {
2179 unsigned int a_info; /* Use macros N_MAGIC, etc for access */
2180 unsigned int a_text; /* length of text, in bytes */
2181 unsigned int a_data; /* length of data, in bytes */
2182 unsigned int a_bss; /* length of uninitialized data area, in bytes */
2183 unsigned int a_syms; /* length of symbol table data in file, in bytes */
2184 unsigned int a_entry; /* start address */
2185 unsigned int a_trsize; /* length of relocation info for text, in bytes */
2186 unsigned int a_drsize; /* length of relocation info for data, in bytes */
2187 };
2188
2189
2190 #define N_MAGIC(exec) ((exec).a_info & 0xffff)
2191 #define OMAGIC 0407
2192 #define NMAGIC 0410
2193 #define ZMAGIC 0413
2194 #define QMAGIC 0314
2195
2196 #define DLINFO_ITEMS 16
2197
memcpy_fromfs(void * to,const void * from,unsigned long n)2198 static inline void memcpy_fromfs(void * to, const void * from, unsigned long n)
2199 {
2200 memcpy(to, from, n);
2201 }
2202
bswap_ehdr(struct elfhdr * ehdr)2203 static void bswap_ehdr(struct elfhdr *ehdr)
2204 {
2205 if (!target_needs_bswap()) {
2206 return;
2207 }
2208
2209 bswap16s(&ehdr->e_type); /* Object file type */
2210 bswap16s(&ehdr->e_machine); /* Architecture */
2211 bswap32s(&ehdr->e_version); /* Object file version */
2212 bswaptls(&ehdr->e_entry); /* Entry point virtual address */
2213 bswaptls(&ehdr->e_phoff); /* Program header table file offset */
2214 bswaptls(&ehdr->e_shoff); /* Section header table file offset */
2215 bswap32s(&ehdr->e_flags); /* Processor-specific flags */
2216 bswap16s(&ehdr->e_ehsize); /* ELF header size in bytes */
2217 bswap16s(&ehdr->e_phentsize); /* Program header table entry size */
2218 bswap16s(&ehdr->e_phnum); /* Program header table entry count */
2219 bswap16s(&ehdr->e_shentsize); /* Section header table entry size */
2220 bswap16s(&ehdr->e_shnum); /* Section header table entry count */
2221 bswap16s(&ehdr->e_shstrndx); /* Section header string table index */
2222 }
2223
bswap_phdr(struct elf_phdr * phdr,int phnum)2224 static void bswap_phdr(struct elf_phdr *phdr, int phnum)
2225 {
2226 if (!target_needs_bswap()) {
2227 return;
2228 }
2229
2230 for (int i = 0; i < phnum; ++i, ++phdr) {
2231 bswap32s(&phdr->p_type); /* Segment type */
2232 bswap32s(&phdr->p_flags); /* Segment flags */
2233 bswaptls(&phdr->p_offset); /* Segment file offset */
2234 bswaptls(&phdr->p_vaddr); /* Segment virtual address */
2235 bswaptls(&phdr->p_paddr); /* Segment physical address */
2236 bswaptls(&phdr->p_filesz); /* Segment size in file */
2237 bswaptls(&phdr->p_memsz); /* Segment size in memory */
2238 bswaptls(&phdr->p_align); /* Segment alignment */
2239 }
2240 }
2241
bswap_shdr(struct elf_shdr * shdr,int shnum)2242 static void bswap_shdr(struct elf_shdr *shdr, int shnum)
2243 {
2244 if (!target_needs_bswap()) {
2245 return;
2246 }
2247
2248 for (int i = 0; i < shnum; ++i, ++shdr) {
2249 bswap32s(&shdr->sh_name);
2250 bswap32s(&shdr->sh_type);
2251 bswaptls(&shdr->sh_flags);
2252 bswaptls(&shdr->sh_addr);
2253 bswaptls(&shdr->sh_offset);
2254 bswaptls(&shdr->sh_size);
2255 bswap32s(&shdr->sh_link);
2256 bswap32s(&shdr->sh_info);
2257 bswaptls(&shdr->sh_addralign);
2258 bswaptls(&shdr->sh_entsize);
2259 }
2260 }
2261
bswap_sym(struct elf_sym * sym)2262 static void bswap_sym(struct elf_sym *sym)
2263 {
2264 if (!target_needs_bswap()) {
2265 return;
2266 }
2267
2268 bswap32s(&sym->st_name);
2269 bswaptls(&sym->st_value);
2270 bswaptls(&sym->st_size);
2271 bswap16s(&sym->st_shndx);
2272 }
2273
2274 #ifdef TARGET_MIPS
bswap_mips_abiflags(Mips_elf_abiflags_v0 * abiflags)2275 static void bswap_mips_abiflags(Mips_elf_abiflags_v0 *abiflags)
2276 {
2277 if (!target_needs_bswap()) {
2278 return;
2279 }
2280
2281 bswap16s(&abiflags->version);
2282 bswap32s(&abiflags->ases);
2283 bswap32s(&abiflags->isa_ext);
2284 bswap32s(&abiflags->flags1);
2285 bswap32s(&abiflags->flags2);
2286 }
2287 #endif
2288
2289 #ifdef USE_ELF_CORE_DUMP
2290 static int elf_core_dump(int, const CPUArchState *);
2291 #endif /* USE_ELF_CORE_DUMP */
2292 static void load_symbols(struct elfhdr *hdr, const ImageSource *src,
2293 abi_ulong load_bias);
2294
2295 /* Verify the portions of EHDR within E_IDENT for the target.
2296 This can be performed before bswapping the entire header. */
elf_check_ident(struct elfhdr * ehdr)2297 static bool elf_check_ident(struct elfhdr *ehdr)
2298 {
2299 return (ehdr->e_ident[EI_MAG0] == ELFMAG0
2300 && ehdr->e_ident[EI_MAG1] == ELFMAG1
2301 && ehdr->e_ident[EI_MAG2] == ELFMAG2
2302 && ehdr->e_ident[EI_MAG3] == ELFMAG3
2303 && ehdr->e_ident[EI_CLASS] == ELF_CLASS
2304 && ehdr->e_ident[EI_DATA] == ELF_DATA
2305 && ehdr->e_ident[EI_VERSION] == EV_CURRENT);
2306 }
2307
2308 /* Verify the portions of EHDR outside of E_IDENT for the target.
2309 This has to wait until after bswapping the header. */
elf_check_ehdr(struct elfhdr * ehdr)2310 static bool elf_check_ehdr(struct elfhdr *ehdr)
2311 {
2312 return (elf_check_arch(ehdr->e_machine)
2313 && elf_check_abi(ehdr->e_flags)
2314 && ehdr->e_ehsize == sizeof(struct elfhdr)
2315 && ehdr->e_phentsize == sizeof(struct elf_phdr)
2316 && (ehdr->e_type == ET_EXEC || ehdr->e_type == ET_DYN));
2317 }
2318
2319 /*
2320 * 'copy_elf_strings()' copies argument/envelope strings from user
2321 * memory to free pages in kernel mem. These are in a format ready
2322 * to be put directly into the top of new user memory.
2323 *
2324 */
copy_elf_strings(int argc,char ** argv,char * scratch,abi_ulong p,abi_ulong stack_limit)2325 static abi_ulong copy_elf_strings(int argc, char **argv, char *scratch,
2326 abi_ulong p, abi_ulong stack_limit)
2327 {
2328 char *tmp;
2329 int len, i;
2330 abi_ulong top = p;
2331
2332 if (!p) {
2333 return 0; /* bullet-proofing */
2334 }
2335
2336 if (STACK_GROWS_DOWN) {
2337 int offset = ((p - 1) % TARGET_PAGE_SIZE) + 1;
2338 for (i = argc - 1; i >= 0; --i) {
2339 tmp = argv[i];
2340 if (!tmp) {
2341 fprintf(stderr, "VFS: argc is wrong");
2342 exit(-1);
2343 }
2344 len = strlen(tmp) + 1;
2345 tmp += len;
2346
2347 if (len > (p - stack_limit)) {
2348 return 0;
2349 }
2350 while (len) {
2351 int bytes_to_copy = (len > offset) ? offset : len;
2352 tmp -= bytes_to_copy;
2353 p -= bytes_to_copy;
2354 offset -= bytes_to_copy;
2355 len -= bytes_to_copy;
2356
2357 memcpy_fromfs(scratch + offset, tmp, bytes_to_copy);
2358
2359 if (offset == 0) {
2360 memcpy_to_target(p, scratch, top - p);
2361 top = p;
2362 offset = TARGET_PAGE_SIZE;
2363 }
2364 }
2365 }
2366 if (p != top) {
2367 memcpy_to_target(p, scratch + offset, top - p);
2368 }
2369 } else {
2370 int remaining = TARGET_PAGE_SIZE - (p % TARGET_PAGE_SIZE);
2371 for (i = 0; i < argc; ++i) {
2372 tmp = argv[i];
2373 if (!tmp) {
2374 fprintf(stderr, "VFS: argc is wrong");
2375 exit(-1);
2376 }
2377 len = strlen(tmp) + 1;
2378 if (len > (stack_limit - p)) {
2379 return 0;
2380 }
2381 while (len) {
2382 int bytes_to_copy = (len > remaining) ? remaining : len;
2383
2384 memcpy_fromfs(scratch + (p - top), tmp, bytes_to_copy);
2385
2386 tmp += bytes_to_copy;
2387 remaining -= bytes_to_copy;
2388 p += bytes_to_copy;
2389 len -= bytes_to_copy;
2390
2391 if (remaining == 0) {
2392 memcpy_to_target(top, scratch, p - top);
2393 top = p;
2394 remaining = TARGET_PAGE_SIZE;
2395 }
2396 }
2397 }
2398 if (p != top) {
2399 memcpy_to_target(top, scratch, p - top);
2400 }
2401 }
2402
2403 return p;
2404 }
2405
2406 /* Older linux kernels provide up to MAX_ARG_PAGES (default: 32) of
2407 * argument/environment space. Newer kernels (>2.6.33) allow more,
2408 * dependent on stack size, but guarantee at least 32 pages for
2409 * backwards compatibility.
2410 */
2411 #define STACK_LOWER_LIMIT (32 * TARGET_PAGE_SIZE)
2412
setup_arg_pages(struct linux_binprm * bprm,struct image_info * info)2413 static abi_ulong setup_arg_pages(struct linux_binprm *bprm,
2414 struct image_info *info)
2415 {
2416 abi_ulong size, error, guard;
2417 int prot;
2418
2419 size = guest_stack_size;
2420 if (size < STACK_LOWER_LIMIT) {
2421 size = STACK_LOWER_LIMIT;
2422 }
2423
2424 if (STACK_GROWS_DOWN) {
2425 guard = TARGET_PAGE_SIZE;
2426 if (guard < qemu_real_host_page_size()) {
2427 guard = qemu_real_host_page_size();
2428 }
2429 } else {
2430 /* no guard page for hppa target where stack grows upwards. */
2431 guard = 0;
2432 }
2433
2434 prot = PROT_READ | PROT_WRITE;
2435 if (info->exec_stack) {
2436 prot |= PROT_EXEC;
2437 }
2438 error = target_mmap(0, size + guard, prot,
2439 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
2440 if (error == -1) {
2441 perror("mmap stack");
2442 exit(-1);
2443 }
2444
2445 /* We reserve one extra page at the top of the stack as guard. */
2446 if (STACK_GROWS_DOWN) {
2447 target_mprotect(error, guard, PROT_NONE);
2448 info->stack_limit = error + guard;
2449 return info->stack_limit + size - sizeof(void *);
2450 } else {
2451 info->stack_limit = error + size;
2452 return error;
2453 }
2454 }
2455
2456 /**
2457 * zero_bss:
2458 *
2459 * Map and zero the bss. We need to explicitly zero any fractional pages
2460 * after the data section (i.e. bss). Return false on mapping failure.
2461 */
zero_bss(abi_ulong start_bss,abi_ulong end_bss,int prot,Error ** errp)2462 static bool zero_bss(abi_ulong start_bss, abi_ulong end_bss,
2463 int prot, Error **errp)
2464 {
2465 abi_ulong align_bss;
2466
2467 /* We only expect writable bss; the code segment shouldn't need this. */
2468 if (!(prot & PROT_WRITE)) {
2469 error_setg(errp, "PT_LOAD with non-writable bss");
2470 return false;
2471 }
2472
2473 align_bss = TARGET_PAGE_ALIGN(start_bss);
2474 end_bss = TARGET_PAGE_ALIGN(end_bss);
2475
2476 if (start_bss < align_bss) {
2477 int flags = page_get_flags(start_bss);
2478
2479 if (!(flags & PAGE_RWX)) {
2480 /*
2481 * The whole address space of the executable was reserved
2482 * at the start, therefore all pages will be VALID.
2483 * But assuming there are no PROT_NONE PT_LOAD segments,
2484 * a PROT_NONE page means no data all bss, and we can
2485 * simply extend the new anon mapping back to the start
2486 * of the page of bss.
2487 */
2488 align_bss -= TARGET_PAGE_SIZE;
2489 } else {
2490 /*
2491 * The start of the bss shares a page with something.
2492 * The only thing that we expect is the data section,
2493 * which would already be marked writable.
2494 * Overlapping the RX code segment seems malformed.
2495 */
2496 if (!(flags & PAGE_WRITE)) {
2497 error_setg(errp, "PT_LOAD with bss overlapping "
2498 "non-writable page");
2499 return false;
2500 }
2501
2502 /* The page is already mapped and writable. */
2503 memset(g2h_untagged(start_bss), 0, align_bss - start_bss);
2504 }
2505 }
2506
2507 if (align_bss < end_bss &&
2508 target_mmap(align_bss, end_bss - align_bss, prot,
2509 MAP_FIXED | MAP_PRIVATE | MAP_ANON, -1, 0) == -1) {
2510 error_setg_errno(errp, errno, "Error mapping bss");
2511 return false;
2512 }
2513 return true;
2514 }
2515
2516 #if defined(TARGET_ARM)
elf_is_fdpic(struct elfhdr * exec)2517 static int elf_is_fdpic(struct elfhdr *exec)
2518 {
2519 return exec->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC;
2520 }
2521 #elif defined(TARGET_XTENSA)
elf_is_fdpic(struct elfhdr * exec)2522 static int elf_is_fdpic(struct elfhdr *exec)
2523 {
2524 return exec->e_ident[EI_OSABI] == ELFOSABI_XTENSA_FDPIC;
2525 }
2526 #else
2527 /* Default implementation, always false. */
elf_is_fdpic(struct elfhdr * exec)2528 static int elf_is_fdpic(struct elfhdr *exec)
2529 {
2530 return 0;
2531 }
2532 #endif
2533
loader_build_fdpic_loadmap(struct image_info * info,abi_ulong sp)2534 static abi_ulong loader_build_fdpic_loadmap(struct image_info *info, abi_ulong sp)
2535 {
2536 uint16_t n;
2537 struct elf32_fdpic_loadseg *loadsegs = info->loadsegs;
2538
2539 /* elf32_fdpic_loadseg */
2540 n = info->nsegs;
2541 while (n--) {
2542 sp -= 12;
2543 put_user_u32(loadsegs[n].addr, sp+0);
2544 put_user_u32(loadsegs[n].p_vaddr, sp+4);
2545 put_user_u32(loadsegs[n].p_memsz, sp+8);
2546 }
2547
2548 /* elf32_fdpic_loadmap */
2549 sp -= 4;
2550 put_user_u16(0, sp+0); /* version */
2551 put_user_u16(info->nsegs, sp+2); /* nsegs */
2552
2553 info->personality = PER_LINUX_FDPIC;
2554 info->loadmap_addr = sp;
2555
2556 return sp;
2557 }
2558
create_elf_tables(abi_ulong p,int argc,int envc,struct elfhdr * exec,struct image_info * info,struct image_info * interp_info,struct image_info * vdso_info)2559 static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc,
2560 struct elfhdr *exec,
2561 struct image_info *info,
2562 struct image_info *interp_info,
2563 struct image_info *vdso_info)
2564 {
2565 abi_ulong sp;
2566 abi_ulong u_argc, u_argv, u_envp, u_auxv;
2567 int size;
2568 int i;
2569 abi_ulong u_rand_bytes;
2570 uint8_t k_rand_bytes[16];
2571 abi_ulong u_platform, u_base_platform;
2572 const char *k_platform, *k_base_platform;
2573 const int n = sizeof(elf_addr_t);
2574
2575 sp = p;
2576
2577 /* Needs to be before we load the env/argc/... */
2578 if (elf_is_fdpic(exec)) {
2579 /* Need 4 byte alignment for these structs */
2580 sp &= ~3;
2581 sp = loader_build_fdpic_loadmap(info, sp);
2582 info->other_info = interp_info;
2583 if (interp_info) {
2584 interp_info->other_info = info;
2585 sp = loader_build_fdpic_loadmap(interp_info, sp);
2586 info->interpreter_loadmap_addr = interp_info->loadmap_addr;
2587 info->interpreter_pt_dynamic_addr = interp_info->pt_dynamic_addr;
2588 } else {
2589 info->interpreter_loadmap_addr = 0;
2590 info->interpreter_pt_dynamic_addr = 0;
2591 }
2592 }
2593
2594 u_base_platform = 0;
2595 k_base_platform = ELF_BASE_PLATFORM;
2596 if (k_base_platform) {
2597 size_t len = strlen(k_base_platform) + 1;
2598 if (STACK_GROWS_DOWN) {
2599 sp -= (len + n - 1) & ~(n - 1);
2600 u_base_platform = sp;
2601 /* FIXME - check return value of memcpy_to_target() for failure */
2602 memcpy_to_target(sp, k_base_platform, len);
2603 } else {
2604 memcpy_to_target(sp, k_base_platform, len);
2605 u_base_platform = sp;
2606 sp += len + 1;
2607 }
2608 }
2609
2610 u_platform = 0;
2611 k_platform = ELF_PLATFORM;
2612 if (k_platform) {
2613 size_t len = strlen(k_platform) + 1;
2614 if (STACK_GROWS_DOWN) {
2615 sp -= (len + n - 1) & ~(n - 1);
2616 u_platform = sp;
2617 /* FIXME - check return value of memcpy_to_target() for failure */
2618 memcpy_to_target(sp, k_platform, len);
2619 } else {
2620 memcpy_to_target(sp, k_platform, len);
2621 u_platform = sp;
2622 sp += len + 1;
2623 }
2624 }
2625
2626 /* Provide 16 byte alignment for the PRNG, and basic alignment for
2627 * the argv and envp pointers.
2628 */
2629 if (STACK_GROWS_DOWN) {
2630 sp = QEMU_ALIGN_DOWN(sp, 16);
2631 } else {
2632 sp = QEMU_ALIGN_UP(sp, 16);
2633 }
2634
2635 /*
2636 * Generate 16 random bytes for userspace PRNG seeding.
2637 */
2638 qemu_guest_getrandom_nofail(k_rand_bytes, sizeof(k_rand_bytes));
2639 if (STACK_GROWS_DOWN) {
2640 sp -= 16;
2641 u_rand_bytes = sp;
2642 /* FIXME - check return value of memcpy_to_target() for failure */
2643 memcpy_to_target(sp, k_rand_bytes, 16);
2644 } else {
2645 memcpy_to_target(sp, k_rand_bytes, 16);
2646 u_rand_bytes = sp;
2647 sp += 16;
2648 }
2649
2650 size = (DLINFO_ITEMS + 1) * 2;
2651 if (k_base_platform) {
2652 size += 2;
2653 }
2654 if (k_platform) {
2655 size += 2;
2656 }
2657 if (vdso_info) {
2658 size += 2;
2659 }
2660 #ifdef DLINFO_ARCH_ITEMS
2661 size += DLINFO_ARCH_ITEMS * 2;
2662 #endif
2663 #ifdef ELF_HWCAP2
2664 size += 2;
2665 #endif
2666 info->auxv_len = size * n;
2667
2668 size += envc + argc + 2;
2669 size += 1; /* argc itself */
2670 size *= n;
2671
2672 /* Allocate space and finalize stack alignment for entry now. */
2673 if (STACK_GROWS_DOWN) {
2674 u_argc = QEMU_ALIGN_DOWN(sp - size, STACK_ALIGNMENT);
2675 sp = u_argc;
2676 } else {
2677 u_argc = sp;
2678 sp = QEMU_ALIGN_UP(sp + size, STACK_ALIGNMENT);
2679 }
2680
2681 u_argv = u_argc + n;
2682 u_envp = u_argv + (argc + 1) * n;
2683 u_auxv = u_envp + (envc + 1) * n;
2684 info->saved_auxv = u_auxv;
2685 info->argc = argc;
2686 info->envc = envc;
2687 info->argv = u_argv;
2688 info->envp = u_envp;
2689
2690 /* This is correct because Linux defines
2691 * elf_addr_t as Elf32_Off / Elf64_Off
2692 */
2693 #define NEW_AUX_ENT(id, val) do { \
2694 put_user_ual(id, u_auxv); u_auxv += n; \
2695 put_user_ual(val, u_auxv); u_auxv += n; \
2696 } while(0)
2697
2698 #ifdef ARCH_DLINFO
2699 /*
2700 * ARCH_DLINFO must come first so platform specific code can enforce
2701 * special alignment requirements on the AUXV if necessary (eg. PPC).
2702 */
2703 ARCH_DLINFO;
2704 #endif
2705 /* There must be exactly DLINFO_ITEMS entries here, or the assert
2706 * on info->auxv_len will trigger.
2707 */
2708 NEW_AUX_ENT(AT_PHDR, (abi_ulong)(info->load_addr + exec->e_phoff));
2709 NEW_AUX_ENT(AT_PHENT, (abi_ulong)(sizeof (struct elf_phdr)));
2710 NEW_AUX_ENT(AT_PHNUM, (abi_ulong)(exec->e_phnum));
2711 NEW_AUX_ENT(AT_PAGESZ, (abi_ulong)(TARGET_PAGE_SIZE));
2712 NEW_AUX_ENT(AT_BASE, (abi_ulong)(interp_info ? interp_info->load_addr : 0));
2713 NEW_AUX_ENT(AT_FLAGS, (abi_ulong)0);
2714 NEW_AUX_ENT(AT_ENTRY, info->entry);
2715 NEW_AUX_ENT(AT_UID, (abi_ulong) getuid());
2716 NEW_AUX_ENT(AT_EUID, (abi_ulong) geteuid());
2717 NEW_AUX_ENT(AT_GID, (abi_ulong) getgid());
2718 NEW_AUX_ENT(AT_EGID, (abi_ulong) getegid());
2719 NEW_AUX_ENT(AT_HWCAP, (abi_ulong) ELF_HWCAP);
2720 NEW_AUX_ENT(AT_CLKTCK, (abi_ulong) sysconf(_SC_CLK_TCK));
2721 NEW_AUX_ENT(AT_RANDOM, (abi_ulong) u_rand_bytes);
2722 NEW_AUX_ENT(AT_SECURE, (abi_ulong) qemu_getauxval(AT_SECURE));
2723 NEW_AUX_ENT(AT_EXECFN, info->file_string);
2724
2725 #ifdef ELF_HWCAP2
2726 NEW_AUX_ENT(AT_HWCAP2, (abi_ulong) ELF_HWCAP2);
2727 #endif
2728
2729 if (u_base_platform) {
2730 NEW_AUX_ENT(AT_BASE_PLATFORM, u_base_platform);
2731 }
2732 if (u_platform) {
2733 NEW_AUX_ENT(AT_PLATFORM, u_platform);
2734 }
2735 if (vdso_info) {
2736 NEW_AUX_ENT(AT_SYSINFO_EHDR, vdso_info->load_addr);
2737 }
2738 NEW_AUX_ENT (AT_NULL, 0);
2739 #undef NEW_AUX_ENT
2740
2741 /* Check that our initial calculation of the auxv length matches how much
2742 * we actually put into it.
2743 */
2744 assert(info->auxv_len == u_auxv - info->saved_auxv);
2745
2746 put_user_ual(argc, u_argc);
2747
2748 p = info->arg_strings;
2749 for (i = 0; i < argc; ++i) {
2750 put_user_ual(p, u_argv);
2751 u_argv += n;
2752 p += target_strlen(p) + 1;
2753 }
2754 put_user_ual(0, u_argv);
2755
2756 p = info->env_strings;
2757 for (i = 0; i < envc; ++i) {
2758 put_user_ual(p, u_envp);
2759 u_envp += n;
2760 p += target_strlen(p) + 1;
2761 }
2762 put_user_ual(0, u_envp);
2763
2764 return sp;
2765 }
2766
2767 #if defined(HI_COMMPAGE)
2768 #define LO_COMMPAGE -1
2769 #elif defined(LO_COMMPAGE)
2770 #define HI_COMMPAGE 0
2771 #else
2772 #define HI_COMMPAGE 0
2773 #define LO_COMMPAGE -1
2774 #ifndef INIT_GUEST_COMMPAGE
2775 #define init_guest_commpage() true
2776 #endif
2777 #endif
2778
2779 /**
2780 * pgb_try_mmap:
2781 * @addr: host start address
2782 * @addr_last: host last address
2783 * @keep: do not unmap the probe region
2784 *
2785 * Return 1 if [@addr, @addr_last] is not mapped in the host,
2786 * return 0 if it is not available to map, and -1 on mmap error.
2787 * If @keep, the region is left mapped on success, otherwise unmapped.
2788 */
pgb_try_mmap(uintptr_t addr,uintptr_t addr_last,bool keep)2789 static int pgb_try_mmap(uintptr_t addr, uintptr_t addr_last, bool keep)
2790 {
2791 size_t size = addr_last - addr + 1;
2792 void *p = mmap((void *)addr, size, PROT_NONE,
2793 MAP_ANONYMOUS | MAP_PRIVATE |
2794 MAP_NORESERVE | MAP_FIXED_NOREPLACE, -1, 0);
2795 int ret;
2796
2797 if (p == MAP_FAILED) {
2798 return errno == EEXIST ? 0 : -1;
2799 }
2800 ret = p == (void *)addr;
2801 if (!keep || !ret) {
2802 munmap(p, size);
2803 }
2804 return ret;
2805 }
2806
2807 /**
2808 * pgb_try_mmap_skip_brk(uintptr_t addr, uintptr_t size, uintptr_t brk)
2809 * @addr: host address
2810 * @addr_last: host last address
2811 * @brk: host brk
2812 *
2813 * Like pgb_try_mmap, but additionally reserve some memory following brk.
2814 */
pgb_try_mmap_skip_brk(uintptr_t addr,uintptr_t addr_last,uintptr_t brk,bool keep)2815 static int pgb_try_mmap_skip_brk(uintptr_t addr, uintptr_t addr_last,
2816 uintptr_t brk, bool keep)
2817 {
2818 uintptr_t brk_last = brk + 16 * MiB - 1;
2819
2820 /* Do not map anything close to the host brk. */
2821 if (addr <= brk_last && brk <= addr_last) {
2822 return 0;
2823 }
2824 return pgb_try_mmap(addr, addr_last, keep);
2825 }
2826
2827 /**
2828 * pgb_try_mmap_set:
2829 * @ga: set of guest addrs
2830 * @base: guest_base
2831 * @brk: host brk
2832 *
2833 * Return true if all @ga can be mapped by the host at @base.
2834 * On success, retain the mapping at index 0 for reserved_va.
2835 */
2836
2837 typedef struct PGBAddrs {
2838 uintptr_t bounds[3][2]; /* start/last pairs */
2839 int nbounds;
2840 } PGBAddrs;
2841
pgb_try_mmap_set(const PGBAddrs * ga,uintptr_t base,uintptr_t brk)2842 static bool pgb_try_mmap_set(const PGBAddrs *ga, uintptr_t base, uintptr_t brk)
2843 {
2844 for (int i = ga->nbounds - 1; i >= 0; --i) {
2845 if (pgb_try_mmap_skip_brk(ga->bounds[i][0] + base,
2846 ga->bounds[i][1] + base,
2847 brk, i == 0 && reserved_va) <= 0) {
2848 return false;
2849 }
2850 }
2851 return true;
2852 }
2853
2854 /**
2855 * pgb_addr_set:
2856 * @ga: output set of guest addrs
2857 * @guest_loaddr: guest image low address
2858 * @guest_loaddr: guest image high address
2859 * @identity: create for identity mapping
2860 *
2861 * Fill in @ga with the image, COMMPAGE and NULL page.
2862 */
pgb_addr_set(PGBAddrs * ga,abi_ulong guest_loaddr,abi_ulong guest_hiaddr,bool try_identity)2863 static bool pgb_addr_set(PGBAddrs *ga, abi_ulong guest_loaddr,
2864 abi_ulong guest_hiaddr, bool try_identity)
2865 {
2866 int n;
2867
2868 /*
2869 * With a low commpage, or a guest mapped very low,
2870 * we may not be able to use the identity map.
2871 */
2872 if (try_identity) {
2873 if (LO_COMMPAGE != -1 && LO_COMMPAGE < mmap_min_addr) {
2874 return false;
2875 }
2876 if (guest_loaddr != 0 && guest_loaddr < mmap_min_addr) {
2877 return false;
2878 }
2879 }
2880
2881 memset(ga, 0, sizeof(*ga));
2882 n = 0;
2883
2884 if (reserved_va) {
2885 ga->bounds[n][0] = try_identity ? mmap_min_addr : 0;
2886 ga->bounds[n][1] = reserved_va;
2887 n++;
2888 /* LO_COMMPAGE and NULL handled by reserving from 0. */
2889 } else {
2890 /* Add any LO_COMMPAGE or NULL page. */
2891 if (LO_COMMPAGE != -1) {
2892 ga->bounds[n][0] = 0;
2893 ga->bounds[n][1] = LO_COMMPAGE + TARGET_PAGE_SIZE - 1;
2894 n++;
2895 } else if (!try_identity) {
2896 ga->bounds[n][0] = 0;
2897 ga->bounds[n][1] = TARGET_PAGE_SIZE - 1;
2898 n++;
2899 }
2900
2901 /* Add the guest image for ET_EXEC. */
2902 if (guest_loaddr) {
2903 ga->bounds[n][0] = guest_loaddr;
2904 ga->bounds[n][1] = guest_hiaddr;
2905 n++;
2906 }
2907 }
2908
2909 /*
2910 * Temporarily disable
2911 * "comparison is always false due to limited range of data type"
2912 * due to comparison between unsigned and (possible) 0.
2913 */
2914 #pragma GCC diagnostic push
2915 #pragma GCC diagnostic ignored "-Wtype-limits"
2916
2917 /* Add any HI_COMMPAGE not covered by reserved_va. */
2918 if (reserved_va < HI_COMMPAGE) {
2919 ga->bounds[n][0] = HI_COMMPAGE & qemu_real_host_page_mask();
2920 ga->bounds[n][1] = HI_COMMPAGE + TARGET_PAGE_SIZE - 1;
2921 n++;
2922 }
2923
2924 #pragma GCC diagnostic pop
2925
2926 ga->nbounds = n;
2927 return true;
2928 }
2929
pgb_fail_in_use(const char * image_name)2930 static void pgb_fail_in_use(const char *image_name)
2931 {
2932 error_report("%s: requires virtual address space that is in use "
2933 "(omit the -B option or choose a different value)",
2934 image_name);
2935 exit(EXIT_FAILURE);
2936 }
2937
pgb_fixed(const char * image_name,uintptr_t guest_loaddr,uintptr_t guest_hiaddr,uintptr_t align)2938 static void pgb_fixed(const char *image_name, uintptr_t guest_loaddr,
2939 uintptr_t guest_hiaddr, uintptr_t align)
2940 {
2941 PGBAddrs ga;
2942 uintptr_t brk = (uintptr_t)sbrk(0);
2943
2944 if (!QEMU_IS_ALIGNED(guest_base, align)) {
2945 fprintf(stderr, "Requested guest base %p does not satisfy "
2946 "host minimum alignment (0x%" PRIxPTR ")\n",
2947 (void *)guest_base, align);
2948 exit(EXIT_FAILURE);
2949 }
2950
2951 if (!pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, !guest_base)
2952 || !pgb_try_mmap_set(&ga, guest_base, brk)) {
2953 pgb_fail_in_use(image_name);
2954 }
2955 }
2956
2957 /**
2958 * pgb_find_fallback:
2959 *
2960 * This is a fallback method for finding holes in the host address space
2961 * if we don't have the benefit of being able to access /proc/self/map.
2962 * It can potentially take a very long time as we can only dumbly iterate
2963 * up the host address space seeing if the allocation would work.
2964 */
pgb_find_fallback(const PGBAddrs * ga,uintptr_t align,uintptr_t brk)2965 static uintptr_t pgb_find_fallback(const PGBAddrs *ga, uintptr_t align,
2966 uintptr_t brk)
2967 {
2968 /* TODO: come up with a better estimate of how much to skip. */
2969 uintptr_t skip = sizeof(uintptr_t) == 4 ? MiB : GiB;
2970
2971 for (uintptr_t base = skip; ; base += skip) {
2972 base = ROUND_UP(base, align);
2973 if (pgb_try_mmap_set(ga, base, brk)) {
2974 return base;
2975 }
2976 if (base >= -skip) {
2977 return -1;
2978 }
2979 }
2980 }
2981
pgb_try_itree(const PGBAddrs * ga,uintptr_t base,IntervalTreeRoot * root)2982 static uintptr_t pgb_try_itree(const PGBAddrs *ga, uintptr_t base,
2983 IntervalTreeRoot *root)
2984 {
2985 for (int i = ga->nbounds - 1; i >= 0; --i) {
2986 uintptr_t s = base + ga->bounds[i][0];
2987 uintptr_t l = base + ga->bounds[i][1];
2988 IntervalTreeNode *n;
2989
2990 if (l < s) {
2991 /* Wraparound. Skip to advance S to mmap_min_addr. */
2992 return mmap_min_addr - s;
2993 }
2994
2995 n = interval_tree_iter_first(root, s, l);
2996 if (n != NULL) {
2997 /* Conflict. Skip to advance S to LAST + 1. */
2998 return n->last - s + 1;
2999 }
3000 }
3001 return 0; /* success */
3002 }
3003
pgb_find_itree(const PGBAddrs * ga,IntervalTreeRoot * root,uintptr_t align,uintptr_t brk)3004 static uintptr_t pgb_find_itree(const PGBAddrs *ga, IntervalTreeRoot *root,
3005 uintptr_t align, uintptr_t brk)
3006 {
3007 uintptr_t last = sizeof(uintptr_t) == 4 ? MiB : GiB;
3008 uintptr_t base, skip;
3009
3010 while (true) {
3011 base = ROUND_UP(last, align);
3012 if (base < last) {
3013 return -1;
3014 }
3015
3016 skip = pgb_try_itree(ga, base, root);
3017 if (skip == 0) {
3018 break;
3019 }
3020
3021 last = base + skip;
3022 if (last < base) {
3023 return -1;
3024 }
3025 }
3026
3027 /*
3028 * We've chosen 'base' based on holes in the interval tree,
3029 * but we don't yet know if it is a valid host address.
3030 * Because it is the first matching hole, if the host addresses
3031 * are invalid we know there are no further matches.
3032 */
3033 return pgb_try_mmap_set(ga, base, brk) ? base : -1;
3034 }
3035
pgb_dynamic(const char * image_name,uintptr_t guest_loaddr,uintptr_t guest_hiaddr,uintptr_t align)3036 static void pgb_dynamic(const char *image_name, uintptr_t guest_loaddr,
3037 uintptr_t guest_hiaddr, uintptr_t align)
3038 {
3039 IntervalTreeRoot *root;
3040 uintptr_t brk, ret;
3041 PGBAddrs ga;
3042
3043 /* Try the identity map first. */
3044 if (pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, true)) {
3045 brk = (uintptr_t)sbrk(0);
3046 if (pgb_try_mmap_set(&ga, 0, brk)) {
3047 guest_base = 0;
3048 return;
3049 }
3050 }
3051
3052 /*
3053 * Rebuild the address set for non-identity map.
3054 * This differs in the mapping of the guest NULL page.
3055 */
3056 pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, false);
3057
3058 root = read_self_maps();
3059
3060 /* Read brk after we've read the maps, which will malloc. */
3061 brk = (uintptr_t)sbrk(0);
3062
3063 if (!root) {
3064 ret = pgb_find_fallback(&ga, align, brk);
3065 } else {
3066 /*
3067 * Reserve the area close to the host brk.
3068 * This will be freed with the rest of the tree.
3069 */
3070 IntervalTreeNode *b = g_new0(IntervalTreeNode, 1);
3071 b->start = brk;
3072 b->last = brk + 16 * MiB - 1;
3073 interval_tree_insert(b, root);
3074
3075 ret = pgb_find_itree(&ga, root, align, brk);
3076 free_self_maps(root);
3077 }
3078
3079 if (ret == -1) {
3080 int w = TARGET_LONG_BITS / 4;
3081
3082 error_report("%s: Unable to find a guest_base to satisfy all "
3083 "guest address mapping requirements", image_name);
3084
3085 for (int i = 0; i < ga.nbounds; ++i) {
3086 error_printf(" %0*" PRIx64 "-%0*" PRIx64 "\n",
3087 w, (uint64_t)ga.bounds[i][0],
3088 w, (uint64_t)ga.bounds[i][1]);
3089 }
3090 exit(EXIT_FAILURE);
3091 }
3092 guest_base = ret;
3093 }
3094
probe_guest_base(const char * image_name,abi_ulong guest_loaddr,abi_ulong guest_hiaddr)3095 void probe_guest_base(const char *image_name, abi_ulong guest_loaddr,
3096 abi_ulong guest_hiaddr)
3097 {
3098 /* In order to use host shmat, we must be able to honor SHMLBA. */
3099 uintptr_t align = MAX(SHMLBA, TARGET_PAGE_SIZE);
3100
3101 /* Sanity check the guest binary. */
3102 if (reserved_va) {
3103 if (guest_hiaddr > reserved_va) {
3104 error_report("%s: requires more than reserved virtual "
3105 "address space (0x%" PRIx64 " > 0x%lx)",
3106 image_name, (uint64_t)guest_hiaddr, reserved_va);
3107 exit(EXIT_FAILURE);
3108 }
3109 } else {
3110 if (guest_hiaddr != (uintptr_t)guest_hiaddr) {
3111 error_report("%s: requires more virtual address space "
3112 "than the host can provide (0x%" PRIx64 ")",
3113 image_name, (uint64_t)guest_hiaddr + 1);
3114 exit(EXIT_FAILURE);
3115 }
3116 }
3117
3118 if (have_guest_base) {
3119 pgb_fixed(image_name, guest_loaddr, guest_hiaddr, align);
3120 } else {
3121 pgb_dynamic(image_name, guest_loaddr, guest_hiaddr, align);
3122 }
3123
3124 /* Reserve and initialize the commpage. */
3125 if (!init_guest_commpage()) {
3126 /* We have already probed for the commpage being free. */
3127 g_assert_not_reached();
3128 }
3129
3130 assert(QEMU_IS_ALIGNED(guest_base, align));
3131 qemu_log_mask(CPU_LOG_PAGE, "Locating guest address space "
3132 "@ 0x%" PRIx64 "\n", (uint64_t)guest_base);
3133 }
3134
3135 enum {
3136 /* The string "GNU\0" as a magic number. */
3137 GNU0_MAGIC = const_le32('G' | 'N' << 8 | 'U' << 16),
3138 NOTE_DATA_SZ = 1 * KiB,
3139 NOTE_NAME_SZ = 4,
3140 ELF_GNU_PROPERTY_ALIGN = ELF_CLASS == ELFCLASS32 ? 4 : 8,
3141 };
3142
3143 /*
3144 * Process a single gnu_property entry.
3145 * Return false for error.
3146 */
parse_elf_property(const uint32_t * data,int * off,int datasz,struct image_info * info,bool have_prev_type,uint32_t * prev_type,Error ** errp)3147 static bool parse_elf_property(const uint32_t *data, int *off, int datasz,
3148 struct image_info *info, bool have_prev_type,
3149 uint32_t *prev_type, Error **errp)
3150 {
3151 uint32_t pr_type, pr_datasz, step;
3152
3153 if (*off > datasz || !QEMU_IS_ALIGNED(*off, ELF_GNU_PROPERTY_ALIGN)) {
3154 goto error_data;
3155 }
3156 datasz -= *off;
3157 data += *off / sizeof(uint32_t);
3158
3159 if (datasz < 2 * sizeof(uint32_t)) {
3160 goto error_data;
3161 }
3162 pr_type = data[0];
3163 pr_datasz = data[1];
3164 data += 2;
3165 datasz -= 2 * sizeof(uint32_t);
3166 step = ROUND_UP(pr_datasz, ELF_GNU_PROPERTY_ALIGN);
3167 if (step > datasz) {
3168 goto error_data;
3169 }
3170
3171 /* Properties are supposed to be unique and sorted on pr_type. */
3172 if (have_prev_type && pr_type <= *prev_type) {
3173 if (pr_type == *prev_type) {
3174 error_setg(errp, "Duplicate property in PT_GNU_PROPERTY");
3175 } else {
3176 error_setg(errp, "Unsorted property in PT_GNU_PROPERTY");
3177 }
3178 return false;
3179 }
3180 *prev_type = pr_type;
3181
3182 if (!arch_parse_elf_property(pr_type, pr_datasz, data, info, errp)) {
3183 return false;
3184 }
3185
3186 *off += 2 * sizeof(uint32_t) + step;
3187 return true;
3188
3189 error_data:
3190 error_setg(errp, "Ill-formed property in PT_GNU_PROPERTY");
3191 return false;
3192 }
3193
3194 /* Process NT_GNU_PROPERTY_TYPE_0. */
parse_elf_properties(const ImageSource * src,struct image_info * info,const struct elf_phdr * phdr,Error ** errp)3195 static bool parse_elf_properties(const ImageSource *src,
3196 struct image_info *info,
3197 const struct elf_phdr *phdr,
3198 Error **errp)
3199 {
3200 union {
3201 struct elf_note nhdr;
3202 uint32_t data[NOTE_DATA_SZ / sizeof(uint32_t)];
3203 } note;
3204
3205 int n, off, datasz;
3206 bool have_prev_type;
3207 uint32_t prev_type;
3208
3209 /* Unless the arch requires properties, ignore them. */
3210 if (!ARCH_USE_GNU_PROPERTY) {
3211 return true;
3212 }
3213
3214 /* If the properties are crazy large, that's too bad. */
3215 n = phdr->p_filesz;
3216 if (n > sizeof(note)) {
3217 error_setg(errp, "PT_GNU_PROPERTY too large");
3218 return false;
3219 }
3220 if (n < sizeof(note.nhdr)) {
3221 error_setg(errp, "PT_GNU_PROPERTY too small");
3222 return false;
3223 }
3224
3225 if (!imgsrc_read(¬e, phdr->p_offset, n, src, errp)) {
3226 return false;
3227 }
3228
3229 /*
3230 * The contents of a valid PT_GNU_PROPERTY is a sequence of uint32_t.
3231 * Swap most of them now, beyond the header and namesz.
3232 */
3233 if (target_needs_bswap()) {
3234 for (int i = 4; i < n / 4; i++) {
3235 bswap32s(note.data + i);
3236 }
3237 }
3238
3239 /*
3240 * Note that nhdr is 3 words, and that the "name" described by namesz
3241 * immediately follows nhdr and is thus at the 4th word. Further, all
3242 * of the inputs to the kernel's round_up are multiples of 4.
3243 */
3244 if (tswap32(note.nhdr.n_type) != NT_GNU_PROPERTY_TYPE_0 ||
3245 tswap32(note.nhdr.n_namesz) != NOTE_NAME_SZ ||
3246 note.data[3] != GNU0_MAGIC) {
3247 error_setg(errp, "Invalid note in PT_GNU_PROPERTY");
3248 return false;
3249 }
3250 off = sizeof(note.nhdr) + NOTE_NAME_SZ;
3251
3252 datasz = tswap32(note.nhdr.n_descsz) + off;
3253 if (datasz > n) {
3254 error_setg(errp, "Invalid note size in PT_GNU_PROPERTY");
3255 return false;
3256 }
3257
3258 have_prev_type = false;
3259 prev_type = 0;
3260 while (1) {
3261 if (off == datasz) {
3262 return true; /* end, exit ok */
3263 }
3264 if (!parse_elf_property(note.data, &off, datasz, info,
3265 have_prev_type, &prev_type, errp)) {
3266 return false;
3267 }
3268 have_prev_type = true;
3269 }
3270 }
3271
3272 /**
3273 * load_elf_image: Load an ELF image into the address space.
3274 * @image_name: the filename of the image, to use in error messages.
3275 * @src: the ImageSource from which to read.
3276 * @info: info collected from the loaded image.
3277 * @ehdr: the ELF header, not yet bswapped.
3278 * @pinterp_name: record any PT_INTERP string found.
3279 *
3280 * On return: @info values will be filled in, as necessary or available.
3281 */
3282
load_elf_image(const char * image_name,const ImageSource * src,struct image_info * info,struct elfhdr * ehdr,char ** pinterp_name)3283 static void load_elf_image(const char *image_name, const ImageSource *src,
3284 struct image_info *info, struct elfhdr *ehdr,
3285 char **pinterp_name)
3286 {
3287 g_autofree struct elf_phdr *phdr = NULL;
3288 abi_ulong load_addr, load_bias, loaddr, hiaddr, error, align;
3289 size_t reserve_size, align_size;
3290 int i, prot_exec;
3291 Error *err = NULL;
3292
3293 /*
3294 * First of all, some simple consistency checks.
3295 * Note that we rely on the bswapped ehdr staying in bprm_buf,
3296 * for later use by load_elf_binary and create_elf_tables.
3297 */
3298 if (!imgsrc_read(ehdr, 0, sizeof(*ehdr), src, &err)) {
3299 goto exit_errmsg;
3300 }
3301 if (!elf_check_ident(ehdr)) {
3302 error_setg(&err, "Invalid ELF image for this architecture");
3303 goto exit_errmsg;
3304 }
3305 bswap_ehdr(ehdr);
3306 if (!elf_check_ehdr(ehdr)) {
3307 error_setg(&err, "Invalid ELF image for this architecture");
3308 goto exit_errmsg;
3309 }
3310
3311 phdr = imgsrc_read_alloc(ehdr->e_phoff,
3312 ehdr->e_phnum * sizeof(struct elf_phdr),
3313 src, &err);
3314 if (phdr == NULL) {
3315 goto exit_errmsg;
3316 }
3317 bswap_phdr(phdr, ehdr->e_phnum);
3318
3319 info->nsegs = 0;
3320 info->pt_dynamic_addr = 0;
3321
3322 mmap_lock();
3323
3324 /*
3325 * Find the maximum size of the image and allocate an appropriate
3326 * amount of memory to handle that. Locate the interpreter, if any.
3327 */
3328 loaddr = -1, hiaddr = 0;
3329 align = 0;
3330 info->exec_stack = EXSTACK_DEFAULT;
3331 for (i = 0; i < ehdr->e_phnum; ++i) {
3332 struct elf_phdr *eppnt = phdr + i;
3333 if (eppnt->p_type == PT_LOAD) {
3334 abi_ulong a = eppnt->p_vaddr & TARGET_PAGE_MASK;
3335 if (a < loaddr) {
3336 loaddr = a;
3337 }
3338 a = eppnt->p_vaddr + eppnt->p_memsz - 1;
3339 if (a > hiaddr) {
3340 hiaddr = a;
3341 }
3342 ++info->nsegs;
3343 align |= eppnt->p_align;
3344 } else if (eppnt->p_type == PT_INTERP && pinterp_name) {
3345 g_autofree char *interp_name = NULL;
3346
3347 if (*pinterp_name) {
3348 error_setg(&err, "Multiple PT_INTERP entries");
3349 goto exit_errmsg;
3350 }
3351
3352 interp_name = imgsrc_read_alloc(eppnt->p_offset, eppnt->p_filesz,
3353 src, &err);
3354 if (interp_name == NULL) {
3355 goto exit_errmsg;
3356 }
3357 if (interp_name[eppnt->p_filesz - 1] != 0) {
3358 error_setg(&err, "Invalid PT_INTERP entry");
3359 goto exit_errmsg;
3360 }
3361 *pinterp_name = g_steal_pointer(&interp_name);
3362 } else if (eppnt->p_type == PT_GNU_PROPERTY) {
3363 if (!parse_elf_properties(src, info, eppnt, &err)) {
3364 goto exit_errmsg;
3365 }
3366 } else if (eppnt->p_type == PT_GNU_STACK) {
3367 info->exec_stack = eppnt->p_flags & PF_X;
3368 }
3369 }
3370
3371 load_addr = loaddr;
3372
3373 align = pow2ceil(align);
3374
3375 if (pinterp_name != NULL) {
3376 if (ehdr->e_type == ET_EXEC) {
3377 /*
3378 * Make sure that the low address does not conflict with
3379 * MMAP_MIN_ADDR or the QEMU application itself.
3380 */
3381 probe_guest_base(image_name, loaddr, hiaddr);
3382 } else {
3383 /*
3384 * The binary is dynamic, but we still need to
3385 * select guest_base. In this case we pass a size.
3386 */
3387 probe_guest_base(image_name, 0, hiaddr - loaddr);
3388
3389 /*
3390 * Avoid collision with the loader by providing a different
3391 * default load address.
3392 */
3393 load_addr += elf_et_dyn_base;
3394
3395 /*
3396 * TODO: Better support for mmap alignment is desirable.
3397 * Since we do not have complete control over the guest
3398 * address space, we prefer the kernel to choose some address
3399 * rather than force the use of LOAD_ADDR via MAP_FIXED.
3400 */
3401 if (align) {
3402 load_addr &= -align;
3403 }
3404 }
3405 }
3406
3407 /*
3408 * Reserve address space for all of this.
3409 *
3410 * In the case of ET_EXEC, we supply MAP_FIXED_NOREPLACE so that we get
3411 * exactly the address range that is required. Without reserved_va,
3412 * the guest address space is not isolated. We have attempted to avoid
3413 * conflict with the host program itself via probe_guest_base, but using
3414 * MAP_FIXED_NOREPLACE instead of MAP_FIXED provides an extra check.
3415 *
3416 * Otherwise this is ET_DYN, and we are searching for a location
3417 * that can hold the memory space required. If the image is
3418 * pre-linked, LOAD_ADDR will be non-zero, and the kernel should
3419 * honor that address if it happens to be free.
3420 *
3421 * In both cases, we will overwrite pages in this range with mappings
3422 * from the executable.
3423 */
3424 reserve_size = (size_t)hiaddr - loaddr + 1;
3425 align_size = reserve_size;
3426
3427 if (ehdr->e_type != ET_EXEC && align > qemu_real_host_page_size()) {
3428 align_size += align - 1;
3429 }
3430
3431 load_addr = target_mmap(load_addr, align_size, PROT_NONE,
3432 MAP_PRIVATE | MAP_ANON | MAP_NORESERVE |
3433 (ehdr->e_type == ET_EXEC ? MAP_FIXED_NOREPLACE : 0),
3434 -1, 0);
3435 if (load_addr == -1) {
3436 goto exit_mmap;
3437 }
3438
3439 if (align_size != reserve_size) {
3440 abi_ulong align_addr = ROUND_UP(load_addr, align);
3441 abi_ulong align_end = TARGET_PAGE_ALIGN(align_addr + reserve_size);
3442 abi_ulong load_end = TARGET_PAGE_ALIGN(load_addr + align_size);
3443
3444 if (align_addr != load_addr) {
3445 target_munmap(load_addr, align_addr - load_addr);
3446 }
3447 if (align_end != load_end) {
3448 target_munmap(align_end, load_end - align_end);
3449 }
3450 load_addr = align_addr;
3451 }
3452
3453 load_bias = load_addr - loaddr;
3454
3455 if (elf_is_fdpic(ehdr)) {
3456 struct elf32_fdpic_loadseg *loadsegs = info->loadsegs =
3457 g_malloc(sizeof(*loadsegs) * info->nsegs);
3458
3459 for (i = 0; i < ehdr->e_phnum; ++i) {
3460 switch (phdr[i].p_type) {
3461 case PT_DYNAMIC:
3462 info->pt_dynamic_addr = phdr[i].p_vaddr + load_bias;
3463 break;
3464 case PT_LOAD:
3465 loadsegs->addr = phdr[i].p_vaddr + load_bias;
3466 loadsegs->p_vaddr = phdr[i].p_vaddr;
3467 loadsegs->p_memsz = phdr[i].p_memsz;
3468 ++loadsegs;
3469 break;
3470 }
3471 }
3472 }
3473
3474 info->load_bias = load_bias;
3475 info->code_offset = load_bias;
3476 info->data_offset = load_bias;
3477 info->load_addr = load_addr;
3478 info->entry = ehdr->e_entry + load_bias;
3479 info->start_code = -1;
3480 info->end_code = 0;
3481 info->start_data = -1;
3482 info->end_data = 0;
3483 /* Usual start for brk is after all sections of the main executable. */
3484 info->brk = TARGET_PAGE_ALIGN(hiaddr + load_bias);
3485 info->elf_flags = ehdr->e_flags;
3486
3487 prot_exec = PROT_EXEC;
3488 #ifdef TARGET_AARCH64
3489 /*
3490 * If the BTI feature is present, this indicates that the executable
3491 * pages of the startup binary should be mapped with PROT_BTI, so that
3492 * branch targets are enforced.
3493 *
3494 * The startup binary is either the interpreter or the static executable.
3495 * The interpreter is responsible for all pages of a dynamic executable.
3496 *
3497 * Elf notes are backward compatible to older cpus.
3498 * Do not enable BTI unless it is supported.
3499 */
3500 if ((info->note_flags & GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
3501 && (pinterp_name == NULL || *pinterp_name == 0)
3502 && cpu_isar_feature(aa64_bti, ARM_CPU(thread_cpu))) {
3503 prot_exec |= TARGET_PROT_BTI;
3504 }
3505 #endif
3506
3507 for (i = 0; i < ehdr->e_phnum; i++) {
3508 struct elf_phdr *eppnt = phdr + i;
3509 if (eppnt->p_type == PT_LOAD) {
3510 abi_ulong vaddr, vaddr_po, vaddr_ps, vaddr_ef, vaddr_em;
3511 int elf_prot = 0;
3512
3513 if (eppnt->p_flags & PF_R) {
3514 elf_prot |= PROT_READ;
3515 }
3516 if (eppnt->p_flags & PF_W) {
3517 elf_prot |= PROT_WRITE;
3518 }
3519 if (eppnt->p_flags & PF_X) {
3520 elf_prot |= prot_exec;
3521 }
3522
3523 vaddr = load_bias + eppnt->p_vaddr;
3524 vaddr_po = vaddr & ~TARGET_PAGE_MASK;
3525 vaddr_ps = vaddr & TARGET_PAGE_MASK;
3526
3527 vaddr_ef = vaddr + eppnt->p_filesz;
3528 vaddr_em = vaddr + eppnt->p_memsz;
3529
3530 /*
3531 * Some segments may be completely empty, with a non-zero p_memsz
3532 * but no backing file segment.
3533 */
3534 if (eppnt->p_filesz != 0) {
3535 error = imgsrc_mmap(vaddr_ps, eppnt->p_filesz + vaddr_po,
3536 elf_prot, MAP_PRIVATE | MAP_FIXED,
3537 src, eppnt->p_offset - vaddr_po);
3538 if (error == -1) {
3539 goto exit_mmap;
3540 }
3541 }
3542
3543 /* If the load segment requests extra zeros (e.g. bss), map it. */
3544 if (vaddr_ef < vaddr_em &&
3545 !zero_bss(vaddr_ef, vaddr_em, elf_prot, &err)) {
3546 goto exit_errmsg;
3547 }
3548
3549 /* Find the full program boundaries. */
3550 if (elf_prot & PROT_EXEC) {
3551 if (vaddr < info->start_code) {
3552 info->start_code = vaddr;
3553 }
3554 if (vaddr_ef > info->end_code) {
3555 info->end_code = vaddr_ef;
3556 }
3557 }
3558 if (elf_prot & PROT_WRITE) {
3559 if (vaddr < info->start_data) {
3560 info->start_data = vaddr;
3561 }
3562 if (vaddr_ef > info->end_data) {
3563 info->end_data = vaddr_ef;
3564 }
3565 }
3566 #ifdef TARGET_MIPS
3567 } else if (eppnt->p_type == PT_MIPS_ABIFLAGS) {
3568 Mips_elf_abiflags_v0 abiflags;
3569
3570 if (!imgsrc_read(&abiflags, eppnt->p_offset, sizeof(abiflags),
3571 src, &err)) {
3572 goto exit_errmsg;
3573 }
3574 bswap_mips_abiflags(&abiflags);
3575 info->fp_abi = abiflags.fp_abi;
3576 #endif
3577 }
3578 }
3579
3580 if (info->end_data == 0) {
3581 info->start_data = info->end_code;
3582 info->end_data = info->end_code;
3583 }
3584
3585 if (qemu_log_enabled()) {
3586 load_symbols(ehdr, src, load_bias);
3587 }
3588
3589 debuginfo_report_elf(image_name, src->fd, load_bias);
3590
3591 mmap_unlock();
3592
3593 close(src->fd);
3594 return;
3595
3596 exit_mmap:
3597 error_setg_errno(&err, errno, "Error mapping file");
3598 goto exit_errmsg;
3599 exit_errmsg:
3600 error_reportf_err(err, "%s: ", image_name);
3601 exit(-1);
3602 }
3603
load_elf_interp(const char * filename,struct image_info * info,char bprm_buf[BPRM_BUF_SIZE])3604 static void load_elf_interp(const char *filename, struct image_info *info,
3605 char bprm_buf[BPRM_BUF_SIZE])
3606 {
3607 struct elfhdr ehdr;
3608 ImageSource src;
3609 int fd, retval;
3610 Error *err = NULL;
3611
3612 fd = open(path(filename), O_RDONLY);
3613 if (fd < 0) {
3614 error_setg_file_open(&err, errno, filename);
3615 error_report_err(err);
3616 exit(-1);
3617 }
3618
3619 retval = read(fd, bprm_buf, BPRM_BUF_SIZE);
3620 if (retval < 0) {
3621 error_setg_errno(&err, errno, "Error reading file header");
3622 error_reportf_err(err, "%s: ", filename);
3623 exit(-1);
3624 }
3625
3626 src.fd = fd;
3627 src.cache = bprm_buf;
3628 src.cache_size = retval;
3629
3630 load_elf_image(filename, &src, info, &ehdr, NULL);
3631 }
3632
3633 #ifndef vdso_image_info
3634 #ifdef VDSO_HEADER
3635 #include VDSO_HEADER
3636 #define vdso_image_info(flags) &vdso_image_info
3637 #else
3638 #define vdso_image_info(flags) NULL
3639 #endif /* VDSO_HEADER */
3640 #endif /* vdso_image_info */
3641
load_elf_vdso(struct image_info * info,const VdsoImageInfo * vdso)3642 static void load_elf_vdso(struct image_info *info, const VdsoImageInfo *vdso)
3643 {
3644 ImageSource src;
3645 struct elfhdr ehdr;
3646 abi_ulong load_bias, load_addr;
3647
3648 src.fd = -1;
3649 src.cache = vdso->image;
3650 src.cache_size = vdso->image_size;
3651
3652 load_elf_image("<internal-vdso>", &src, info, &ehdr, NULL);
3653 load_addr = info->load_addr;
3654 load_bias = info->load_bias;
3655
3656 /*
3657 * We need to relocate the VDSO image. The one built into the kernel
3658 * is built for a fixed address. The one built for QEMU is not, since
3659 * that requires close control of the guest address space.
3660 * We pre-processed the image to locate all of the addresses that need
3661 * to be updated.
3662 */
3663 for (unsigned i = 0, n = vdso->reloc_count; i < n; i++) {
3664 abi_ulong *addr = g2h_untagged(load_addr + vdso->relocs[i]);
3665 *addr = tswapal(tswapal(*addr) + load_bias);
3666 }
3667
3668 /* Install signal trampolines, if present. */
3669 if (vdso->sigreturn_ofs) {
3670 default_sigreturn = load_addr + vdso->sigreturn_ofs;
3671 }
3672 if (vdso->rt_sigreturn_ofs) {
3673 default_rt_sigreturn = load_addr + vdso->rt_sigreturn_ofs;
3674 }
3675
3676 /* Remove write from VDSO segment. */
3677 target_mprotect(info->start_data, info->end_data - info->start_data,
3678 PROT_READ | PROT_EXEC);
3679 }
3680
symfind(const void * s0,const void * s1)3681 static int symfind(const void *s0, const void *s1)
3682 {
3683 struct elf_sym *sym = (struct elf_sym *)s1;
3684 __typeof(sym->st_value) addr = *(uint64_t *)s0;
3685 int result = 0;
3686
3687 if (addr < sym->st_value) {
3688 result = -1;
3689 } else if (addr >= sym->st_value + sym->st_size) {
3690 result = 1;
3691 }
3692 return result;
3693 }
3694
lookup_symbolxx(struct syminfo * s,uint64_t orig_addr)3695 static const char *lookup_symbolxx(struct syminfo *s, uint64_t orig_addr)
3696 {
3697 #if ELF_CLASS == ELFCLASS32
3698 struct elf_sym *syms = s->disas_symtab.elf32;
3699 #else
3700 struct elf_sym *syms = s->disas_symtab.elf64;
3701 #endif
3702
3703 // binary search
3704 struct elf_sym *sym;
3705
3706 sym = bsearch(&orig_addr, syms, s->disas_num_syms, sizeof(*syms), symfind);
3707 if (sym != NULL) {
3708 return s->disas_strtab + sym->st_name;
3709 }
3710
3711 return "";
3712 }
3713
3714 /* FIXME: This should use elf_ops.h.inc */
symcmp(const void * s0,const void * s1)3715 static int symcmp(const void *s0, const void *s1)
3716 {
3717 struct elf_sym *sym0 = (struct elf_sym *)s0;
3718 struct elf_sym *sym1 = (struct elf_sym *)s1;
3719 return (sym0->st_value < sym1->st_value)
3720 ? -1
3721 : ((sym0->st_value > sym1->st_value) ? 1 : 0);
3722 }
3723
3724 /* Best attempt to load symbols from this ELF object. */
load_symbols(struct elfhdr * hdr,const ImageSource * src,abi_ulong load_bias)3725 static void load_symbols(struct elfhdr *hdr, const ImageSource *src,
3726 abi_ulong load_bias)
3727 {
3728 int i, shnum, nsyms, sym_idx = 0, str_idx = 0;
3729 g_autofree struct elf_shdr *shdr = NULL;
3730 char *strings = NULL;
3731 struct elf_sym *syms = NULL;
3732 struct elf_sym *new_syms;
3733 uint64_t segsz;
3734
3735 shnum = hdr->e_shnum;
3736 shdr = imgsrc_read_alloc(hdr->e_shoff, shnum * sizeof(struct elf_shdr),
3737 src, NULL);
3738 if (shdr == NULL) {
3739 return;
3740 }
3741
3742 bswap_shdr(shdr, shnum);
3743 for (i = 0; i < shnum; ++i) {
3744 if (shdr[i].sh_type == SHT_SYMTAB) {
3745 sym_idx = i;
3746 str_idx = shdr[i].sh_link;
3747 goto found;
3748 }
3749 }
3750
3751 /* There will be no symbol table if the file was stripped. */
3752 return;
3753
3754 found:
3755 /* Now know where the strtab and symtab are. Snarf them. */
3756
3757 segsz = shdr[str_idx].sh_size;
3758 strings = g_try_malloc(segsz);
3759 if (!strings) {
3760 goto give_up;
3761 }
3762 if (!imgsrc_read(strings, shdr[str_idx].sh_offset, segsz, src, NULL)) {
3763 goto give_up;
3764 }
3765
3766 segsz = shdr[sym_idx].sh_size;
3767 if (segsz / sizeof(struct elf_sym) > INT_MAX) {
3768 /*
3769 * Implausibly large symbol table: give up rather than ploughing
3770 * on with the number of symbols calculation overflowing.
3771 */
3772 goto give_up;
3773 }
3774 nsyms = segsz / sizeof(struct elf_sym);
3775 syms = g_try_malloc(segsz);
3776 if (!syms) {
3777 goto give_up;
3778 }
3779 if (!imgsrc_read(syms, shdr[sym_idx].sh_offset, segsz, src, NULL)) {
3780 goto give_up;
3781 }
3782
3783 for (i = 0; i < nsyms; ) {
3784 bswap_sym(syms + i);
3785 /* Throw away entries which we do not need. */
3786 if (syms[i].st_shndx == SHN_UNDEF
3787 || syms[i].st_shndx >= SHN_LORESERVE
3788 || ELF_ST_TYPE(syms[i].st_info) != STT_FUNC) {
3789 if (i < --nsyms) {
3790 syms[i] = syms[nsyms];
3791 }
3792 } else {
3793 #if defined(TARGET_ARM) || defined (TARGET_MIPS)
3794 /* The bottom address bit marks a Thumb or MIPS16 symbol. */
3795 syms[i].st_value &= ~(target_ulong)1;
3796 #endif
3797 syms[i].st_value += load_bias;
3798 i++;
3799 }
3800 }
3801
3802 /* No "useful" symbol. */
3803 if (nsyms == 0) {
3804 goto give_up;
3805 }
3806
3807 /*
3808 * Attempt to free the storage associated with the local symbols
3809 * that we threw away. Whether or not this has any effect on the
3810 * memory allocation depends on the malloc implementation and how
3811 * many symbols we managed to discard.
3812 */
3813 new_syms = g_try_renew(struct elf_sym, syms, nsyms);
3814 if (new_syms == NULL) {
3815 goto give_up;
3816 }
3817 syms = new_syms;
3818
3819 qsort(syms, nsyms, sizeof(*syms), symcmp);
3820
3821 {
3822 struct syminfo *s = g_new(struct syminfo, 1);
3823
3824 s->disas_strtab = strings;
3825 s->disas_num_syms = nsyms;
3826 #if ELF_CLASS == ELFCLASS32
3827 s->disas_symtab.elf32 = syms;
3828 #else
3829 s->disas_symtab.elf64 = syms;
3830 #endif
3831 s->lookup_symbol = lookup_symbolxx;
3832 s->next = syminfos;
3833 syminfos = s;
3834 }
3835 return;
3836
3837 give_up:
3838 g_free(strings);
3839 g_free(syms);
3840 }
3841
get_elf_eflags(int fd)3842 uint32_t get_elf_eflags(int fd)
3843 {
3844 struct elfhdr ehdr;
3845 off_t offset;
3846 int ret;
3847
3848 /* Read ELF header */
3849 offset = lseek(fd, 0, SEEK_SET);
3850 if (offset == (off_t) -1) {
3851 return 0;
3852 }
3853 ret = read(fd, &ehdr, sizeof(ehdr));
3854 if (ret < sizeof(ehdr)) {
3855 return 0;
3856 }
3857 offset = lseek(fd, offset, SEEK_SET);
3858 if (offset == (off_t) -1) {
3859 return 0;
3860 }
3861
3862 /* Check ELF signature */
3863 if (!elf_check_ident(&ehdr)) {
3864 return 0;
3865 }
3866
3867 /* check header */
3868 bswap_ehdr(&ehdr);
3869 if (!elf_check_ehdr(&ehdr)) {
3870 return 0;
3871 }
3872
3873 /* return architecture id */
3874 return ehdr.e_flags;
3875 }
3876
load_elf_binary(struct linux_binprm * bprm,struct image_info * info)3877 int load_elf_binary(struct linux_binprm *bprm, struct image_info *info)
3878 {
3879 /*
3880 * We need a copy of the elf header for passing to create_elf_tables.
3881 * We will have overwritten the original when we re-use bprm->buf
3882 * while loading the interpreter. Allocate the storage for this now
3883 * and let elf_load_image do any swapping that may be required.
3884 */
3885 struct elfhdr ehdr;
3886 struct image_info interp_info, vdso_info;
3887 char *elf_interpreter = NULL;
3888 char *scratch;
3889
3890 memset(&interp_info, 0, sizeof(interp_info));
3891 #ifdef TARGET_MIPS
3892 interp_info.fp_abi = MIPS_ABI_FP_UNKNOWN;
3893 #endif
3894
3895 load_elf_image(bprm->filename, &bprm->src, info, &ehdr, &elf_interpreter);
3896
3897 /* Do this so that we can load the interpreter, if need be. We will
3898 change some of these later */
3899 bprm->p = setup_arg_pages(bprm, info);
3900
3901 scratch = g_new0(char, TARGET_PAGE_SIZE);
3902 if (STACK_GROWS_DOWN) {
3903 bprm->p = copy_elf_strings(1, &bprm->filename, scratch,
3904 bprm->p, info->stack_limit);
3905 info->file_string = bprm->p;
3906 bprm->p = copy_elf_strings(bprm->envc, bprm->envp, scratch,
3907 bprm->p, info->stack_limit);
3908 info->env_strings = bprm->p;
3909 bprm->p = copy_elf_strings(bprm->argc, bprm->argv, scratch,
3910 bprm->p, info->stack_limit);
3911 info->arg_strings = bprm->p;
3912 } else {
3913 info->arg_strings = bprm->p;
3914 bprm->p = copy_elf_strings(bprm->argc, bprm->argv, scratch,
3915 bprm->p, info->stack_limit);
3916 info->env_strings = bprm->p;
3917 bprm->p = copy_elf_strings(bprm->envc, bprm->envp, scratch,
3918 bprm->p, info->stack_limit);
3919 info->file_string = bprm->p;
3920 bprm->p = copy_elf_strings(1, &bprm->filename, scratch,
3921 bprm->p, info->stack_limit);
3922 }
3923
3924 g_free(scratch);
3925
3926 if (!bprm->p) {
3927 fprintf(stderr, "%s: %s\n", bprm->filename, strerror(E2BIG));
3928 exit(-1);
3929 }
3930
3931 if (elf_interpreter) {
3932 load_elf_interp(elf_interpreter, &interp_info, bprm->buf);
3933
3934 /*
3935 * While unusual because of ELF_ET_DYN_BASE, if we are unlucky
3936 * with the mappings the interpreter can be loaded above but
3937 * near the main executable, which can leave very little room
3938 * for the heap.
3939 * If the current brk has less than 16MB, use the end of the
3940 * interpreter.
3941 */
3942 if (interp_info.brk > info->brk &&
3943 interp_info.load_bias - info->brk < 16 * MiB) {
3944 info->brk = interp_info.brk;
3945 }
3946
3947 /* If the program interpreter is one of these two, then assume
3948 an iBCS2 image. Otherwise assume a native linux image. */
3949
3950 if (strcmp(elf_interpreter, "/usr/lib/libc.so.1") == 0
3951 || strcmp(elf_interpreter, "/usr/lib/ld.so.1") == 0) {
3952 info->personality = PER_SVR4;
3953
3954 /* Why this, you ask??? Well SVr4 maps page 0 as read-only,
3955 and some applications "depend" upon this behavior. Since
3956 we do not have the power to recompile these, we emulate
3957 the SVr4 behavior. Sigh. */
3958 target_mmap(0, TARGET_PAGE_SIZE, PROT_READ | PROT_EXEC,
3959 MAP_FIXED_NOREPLACE | MAP_PRIVATE | MAP_ANONYMOUS,
3960 -1, 0);
3961 }
3962 #ifdef TARGET_MIPS
3963 info->interp_fp_abi = interp_info.fp_abi;
3964 #endif
3965 }
3966
3967 /*
3968 * Load a vdso if available, which will amongst other things contain the
3969 * signal trampolines. Otherwise, allocate a separate page for them.
3970 */
3971 const VdsoImageInfo *vdso = vdso_image_info(info->elf_flags);
3972 if (vdso) {
3973 load_elf_vdso(&vdso_info, vdso);
3974 info->vdso = vdso_info.load_bias;
3975 } else if (TARGET_ARCH_HAS_SIGTRAMP_PAGE) {
3976 abi_long tramp_page = target_mmap(0, TARGET_PAGE_SIZE,
3977 PROT_READ | PROT_WRITE,
3978 MAP_PRIVATE | MAP_ANON, -1, 0);
3979 if (tramp_page == -1) {
3980 return -errno;
3981 }
3982
3983 setup_sigtramp(tramp_page);
3984 target_mprotect(tramp_page, TARGET_PAGE_SIZE, PROT_READ | PROT_EXEC);
3985 }
3986
3987 bprm->p = create_elf_tables(bprm->p, bprm->argc, bprm->envc, &ehdr, info,
3988 elf_interpreter ? &interp_info : NULL,
3989 vdso ? &vdso_info : NULL);
3990 info->start_stack = bprm->p;
3991
3992 /* If we have an interpreter, set that as the program's entry point.
3993 Copy the load_bias as well, to help PPC64 interpret the entry
3994 point as a function descriptor. Do this after creating elf tables
3995 so that we copy the original program entry point into the AUXV. */
3996 if (elf_interpreter) {
3997 info->load_bias = interp_info.load_bias;
3998 info->entry = interp_info.entry;
3999 g_free(elf_interpreter);
4000 }
4001
4002 #ifdef USE_ELF_CORE_DUMP
4003 bprm->core_dump = &elf_core_dump;
4004 #endif
4005
4006 return 0;
4007 }
4008
4009 #ifdef USE_ELF_CORE_DUMP
4010
4011 /*
4012 * Definitions to generate Intel SVR4-like core files.
4013 * These mostly have the same names as the SVR4 types with "target_elf_"
4014 * tacked on the front to prevent clashes with linux definitions,
4015 * and the typedef forms have been avoided. This is mostly like
4016 * the SVR4 structure, but more Linuxy, with things that Linux does
4017 * not support and which gdb doesn't really use excluded.
4018 *
4019 * Fields we don't dump (their contents is zero) in linux-user qemu
4020 * are marked with XXX.
4021 *
4022 * Core dump code is copied from linux kernel (fs/binfmt_elf.c).
4023 *
4024 * Porting ELF coredump for target is (quite) simple process. First you
4025 * define USE_ELF_CORE_DUMP in target ELF code (where init_thread() for
4026 * the target resides):
4027 *
4028 * #define USE_ELF_CORE_DUMP
4029 *
4030 * Next you define type of register set used for dumping. ELF specification
4031 * says that it needs to be array of elf_greg_t that has size of ELF_NREG.
4032 *
4033 * typedef <target_regtype> target_elf_greg_t;
4034 * #define ELF_NREG <number of registers>
4035 * typedef taret_elf_greg_t target_elf_gregset_t[ELF_NREG];
4036 *
4037 * Last step is to implement target specific function that copies registers
4038 * from given cpu into just specified register set. Prototype is:
4039 *
4040 * static void elf_core_copy_regs(taret_elf_gregset_t *regs,
4041 * const CPUArchState *env);
4042 *
4043 * Parameters:
4044 * regs - copy register values into here (allocated and zeroed by caller)
4045 * env - copy registers from here
4046 *
4047 * Example for ARM target is provided in this file.
4048 */
4049
4050 struct target_elf_siginfo {
4051 abi_int si_signo; /* signal number */
4052 abi_int si_code; /* extra code */
4053 abi_int si_errno; /* errno */
4054 };
4055
4056 struct target_elf_prstatus {
4057 struct target_elf_siginfo pr_info; /* Info associated with signal */
4058 abi_short pr_cursig; /* Current signal */
4059 abi_ulong pr_sigpend; /* XXX */
4060 abi_ulong pr_sighold; /* XXX */
4061 target_pid_t pr_pid;
4062 target_pid_t pr_ppid;
4063 target_pid_t pr_pgrp;
4064 target_pid_t pr_sid;
4065 struct target_timeval pr_utime; /* XXX User time */
4066 struct target_timeval pr_stime; /* XXX System time */
4067 struct target_timeval pr_cutime; /* XXX Cumulative user time */
4068 struct target_timeval pr_cstime; /* XXX Cumulative system time */
4069 target_elf_gregset_t pr_reg; /* GP registers */
4070 abi_int pr_fpvalid; /* XXX */
4071 };
4072
4073 #define ELF_PRARGSZ (80) /* Number of chars for args */
4074
4075 struct target_elf_prpsinfo {
4076 char pr_state; /* numeric process state */
4077 char pr_sname; /* char for pr_state */
4078 char pr_zomb; /* zombie */
4079 char pr_nice; /* nice val */
4080 abi_ulong pr_flag; /* flags */
4081 target_uid_t pr_uid;
4082 target_gid_t pr_gid;
4083 target_pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
4084 /* Lots missing */
4085 char pr_fname[16] QEMU_NONSTRING; /* filename of executable */
4086 char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */
4087 };
4088
bswap_prstatus(struct target_elf_prstatus * prstatus)4089 static void bswap_prstatus(struct target_elf_prstatus *prstatus)
4090 {
4091 if (!target_needs_bswap()) {
4092 return;
4093 }
4094
4095 prstatus->pr_info.si_signo = tswap32(prstatus->pr_info.si_signo);
4096 prstatus->pr_info.si_code = tswap32(prstatus->pr_info.si_code);
4097 prstatus->pr_info.si_errno = tswap32(prstatus->pr_info.si_errno);
4098 prstatus->pr_cursig = tswap16(prstatus->pr_cursig);
4099 prstatus->pr_sigpend = tswapal(prstatus->pr_sigpend);
4100 prstatus->pr_sighold = tswapal(prstatus->pr_sighold);
4101 prstatus->pr_pid = tswap32(prstatus->pr_pid);
4102 prstatus->pr_ppid = tswap32(prstatus->pr_ppid);
4103 prstatus->pr_pgrp = tswap32(prstatus->pr_pgrp);
4104 prstatus->pr_sid = tswap32(prstatus->pr_sid);
4105 /* cpu times are not filled, so we skip them */
4106 /* regs should be in correct format already */
4107 prstatus->pr_fpvalid = tswap32(prstatus->pr_fpvalid);
4108 }
4109
bswap_psinfo(struct target_elf_prpsinfo * psinfo)4110 static void bswap_psinfo(struct target_elf_prpsinfo *psinfo)
4111 {
4112 if (!target_needs_bswap()) {
4113 return;
4114 }
4115
4116 psinfo->pr_flag = tswapal(psinfo->pr_flag);
4117 psinfo->pr_uid = tswap16(psinfo->pr_uid);
4118 psinfo->pr_gid = tswap16(psinfo->pr_gid);
4119 psinfo->pr_pid = tswap32(psinfo->pr_pid);
4120 psinfo->pr_ppid = tswap32(psinfo->pr_ppid);
4121 psinfo->pr_pgrp = tswap32(psinfo->pr_pgrp);
4122 psinfo->pr_sid = tswap32(psinfo->pr_sid);
4123 }
4124
bswap_note(struct elf_note * en)4125 static void bswap_note(struct elf_note *en)
4126 {
4127 if (!target_needs_bswap()) {
4128 return;
4129 }
4130
4131 bswap32s(&en->n_namesz);
4132 bswap32s(&en->n_descsz);
4133 bswap32s(&en->n_type);
4134 }
4135
4136 /*
4137 * Calculate file (dump) size of given memory region.
4138 */
vma_dump_size(vaddr start,vaddr end,int flags)4139 static size_t vma_dump_size(vaddr start, vaddr end, int flags)
4140 {
4141 /* The area must be readable. */
4142 if (!(flags & PAGE_READ)) {
4143 return 0;
4144 }
4145
4146 /*
4147 * Usually we don't dump executable pages as they contain
4148 * non-writable code that debugger can read directly from
4149 * target library etc. If there is no elf header, we dump it.
4150 */
4151 if (!(flags & PAGE_WRITE_ORG) &&
4152 (flags & PAGE_EXEC) &&
4153 memcmp(g2h_untagged(start), ELFMAG, SELFMAG) == 0) {
4154 return 0;
4155 }
4156
4157 return end - start;
4158 }
4159
size_note(const char * name,size_t datasz)4160 static size_t size_note(const char *name, size_t datasz)
4161 {
4162 size_t namesz = strlen(name) + 1;
4163
4164 namesz = ROUND_UP(namesz, 4);
4165 datasz = ROUND_UP(datasz, 4);
4166
4167 return sizeof(struct elf_note) + namesz + datasz;
4168 }
4169
fill_note(void ** pptr,int type,const char * name,size_t datasz)4170 static void *fill_note(void **pptr, int type, const char *name, size_t datasz)
4171 {
4172 void *ptr = *pptr;
4173 struct elf_note *n = ptr;
4174 size_t namesz = strlen(name) + 1;
4175
4176 n->n_namesz = namesz;
4177 n->n_descsz = datasz;
4178 n->n_type = type;
4179 bswap_note(n);
4180
4181 ptr += sizeof(*n);
4182 memcpy(ptr, name, namesz);
4183
4184 namesz = ROUND_UP(namesz, 4);
4185 datasz = ROUND_UP(datasz, 4);
4186
4187 *pptr = ptr + namesz + datasz;
4188 return ptr + namesz;
4189 }
4190
fill_elf_header(struct elfhdr * elf,int segs,uint16_t machine,uint32_t flags)4191 static void fill_elf_header(struct elfhdr *elf, int segs, uint16_t machine,
4192 uint32_t flags)
4193 {
4194 memcpy(elf->e_ident, ELFMAG, SELFMAG);
4195
4196 elf->e_ident[EI_CLASS] = ELF_CLASS;
4197 elf->e_ident[EI_DATA] = ELF_DATA;
4198 elf->e_ident[EI_VERSION] = EV_CURRENT;
4199 elf->e_ident[EI_OSABI] = ELF_OSABI;
4200
4201 elf->e_type = ET_CORE;
4202 elf->e_machine = machine;
4203 elf->e_version = EV_CURRENT;
4204 elf->e_phoff = sizeof(struct elfhdr);
4205 elf->e_flags = flags;
4206 elf->e_ehsize = sizeof(struct elfhdr);
4207 elf->e_phentsize = sizeof(struct elf_phdr);
4208 elf->e_phnum = segs;
4209
4210 bswap_ehdr(elf);
4211 }
4212
fill_elf_note_phdr(struct elf_phdr * phdr,size_t sz,off_t offset)4213 static void fill_elf_note_phdr(struct elf_phdr *phdr, size_t sz, off_t offset)
4214 {
4215 phdr->p_type = PT_NOTE;
4216 phdr->p_offset = offset;
4217 phdr->p_filesz = sz;
4218
4219 bswap_phdr(phdr, 1);
4220 }
4221
fill_prstatus_note(void * data,CPUState * cpu,int signr)4222 static void fill_prstatus_note(void *data, CPUState *cpu, int signr)
4223 {
4224 /*
4225 * Because note memory is only aligned to 4, and target_elf_prstatus
4226 * may well have higher alignment requirements, fill locally and
4227 * memcpy to the destination afterward.
4228 */
4229 struct target_elf_prstatus prstatus = {
4230 .pr_info.si_signo = signr,
4231 .pr_cursig = signr,
4232 .pr_pid = get_task_state(cpu)->ts_tid,
4233 .pr_ppid = getppid(),
4234 .pr_pgrp = getpgrp(),
4235 .pr_sid = getsid(0),
4236 };
4237
4238 elf_core_copy_regs(&prstatus.pr_reg, cpu_env(cpu));
4239 bswap_prstatus(&prstatus);
4240 memcpy(data, &prstatus, sizeof(prstatus));
4241 }
4242
fill_prpsinfo_note(void * data,const TaskState * ts)4243 static void fill_prpsinfo_note(void *data, const TaskState *ts)
4244 {
4245 /*
4246 * Because note memory is only aligned to 4, and target_elf_prpsinfo
4247 * may well have higher alignment requirements, fill locally and
4248 * memcpy to the destination afterward.
4249 */
4250 struct target_elf_prpsinfo psinfo = {
4251 .pr_pid = getpid(),
4252 .pr_ppid = getppid(),
4253 .pr_pgrp = getpgrp(),
4254 .pr_sid = getsid(0),
4255 .pr_uid = getuid(),
4256 .pr_gid = getgid(),
4257 };
4258 char *base_filename;
4259 size_t len;
4260
4261 len = ts->info->env_strings - ts->info->arg_strings;
4262 len = MIN(len, ELF_PRARGSZ);
4263 memcpy(&psinfo.pr_psargs, g2h_untagged(ts->info->arg_strings), len);
4264 for (size_t i = 0; i < len; i++) {
4265 if (psinfo.pr_psargs[i] == 0) {
4266 psinfo.pr_psargs[i] = ' ';
4267 }
4268 }
4269
4270 base_filename = g_path_get_basename(ts->bprm->filename);
4271 /*
4272 * Using strncpy here is fine: at max-length,
4273 * this field is not NUL-terminated.
4274 */
4275 strncpy(psinfo.pr_fname, base_filename, sizeof(psinfo.pr_fname));
4276 g_free(base_filename);
4277
4278 bswap_psinfo(&psinfo);
4279 memcpy(data, &psinfo, sizeof(psinfo));
4280 }
4281
fill_auxv_note(void * data,const TaskState * ts)4282 static void fill_auxv_note(void *data, const TaskState *ts)
4283 {
4284 memcpy(data, g2h_untagged(ts->info->saved_auxv), ts->info->auxv_len);
4285 }
4286
4287 /*
4288 * Constructs name of coredump file. We have following convention
4289 * for the name:
4290 * qemu_<basename-of-target-binary>_<date>-<time>_<pid>.core
4291 *
4292 * Returns the filename
4293 */
core_dump_filename(const TaskState * ts)4294 static char *core_dump_filename(const TaskState *ts)
4295 {
4296 g_autoptr(GDateTime) now = g_date_time_new_now_local();
4297 g_autofree char *nowstr = g_date_time_format(now, "%Y%m%d-%H%M%S");
4298 g_autofree char *base_filename = g_path_get_basename(ts->bprm->filename);
4299
4300 return g_strdup_printf("qemu_%s_%s_%d.core",
4301 base_filename, nowstr, (int)getpid());
4302 }
4303
dump_write(int fd,const void * ptr,size_t size)4304 static int dump_write(int fd, const void *ptr, size_t size)
4305 {
4306 const char *bufp = (const char *)ptr;
4307 ssize_t bytes_written, bytes_left;
4308
4309 bytes_written = 0;
4310 bytes_left = size;
4311
4312 /*
4313 * In normal conditions, single write(2) should do but
4314 * in case of socket etc. this mechanism is more portable.
4315 */
4316 do {
4317 bytes_written = write(fd, bufp, bytes_left);
4318 if (bytes_written < 0) {
4319 if (errno == EINTR)
4320 continue;
4321 return (-1);
4322 } else if (bytes_written == 0) { /* eof */
4323 return (-1);
4324 }
4325 bufp += bytes_written;
4326 bytes_left -= bytes_written;
4327 } while (bytes_left > 0);
4328
4329 return (0);
4330 }
4331
wmr_page_unprotect_regions(void * opaque,vaddr start,vaddr end,int flags)4332 static int wmr_page_unprotect_regions(void *opaque, vaddr start,
4333 vaddr end, int flags)
4334 {
4335 if ((flags & (PAGE_WRITE | PAGE_WRITE_ORG)) == PAGE_WRITE_ORG) {
4336 size_t step = MAX(TARGET_PAGE_SIZE, qemu_real_host_page_size());
4337
4338 while (1) {
4339 page_unprotect(NULL, start, 0);
4340 if (end - start <= step) {
4341 break;
4342 }
4343 start += step;
4344 }
4345 }
4346 return 0;
4347 }
4348
4349 typedef struct {
4350 unsigned count;
4351 size_t size;
4352 } CountAndSizeRegions;
4353
wmr_count_and_size_regions(void * opaque,vaddr start,vaddr end,int flags)4354 static int wmr_count_and_size_regions(void *opaque, vaddr start,
4355 vaddr end, int flags)
4356 {
4357 CountAndSizeRegions *css = opaque;
4358
4359 css->count++;
4360 css->size += vma_dump_size(start, end, flags);
4361 return 0;
4362 }
4363
4364 typedef struct {
4365 struct elf_phdr *phdr;
4366 off_t offset;
4367 } FillRegionPhdr;
4368
wmr_fill_region_phdr(void * opaque,vaddr start,vaddr end,int flags)4369 static int wmr_fill_region_phdr(void *opaque, vaddr start,
4370 vaddr end, int flags)
4371 {
4372 FillRegionPhdr *d = opaque;
4373 struct elf_phdr *phdr = d->phdr;
4374
4375 phdr->p_type = PT_LOAD;
4376 phdr->p_vaddr = start;
4377 phdr->p_paddr = 0;
4378 phdr->p_filesz = vma_dump_size(start, end, flags);
4379 phdr->p_offset = d->offset;
4380 d->offset += phdr->p_filesz;
4381 phdr->p_memsz = end - start;
4382 phdr->p_flags = (flags & PAGE_READ ? PF_R : 0)
4383 | (flags & PAGE_WRITE_ORG ? PF_W : 0)
4384 | (flags & PAGE_EXEC ? PF_X : 0);
4385 phdr->p_align = ELF_EXEC_PAGESIZE;
4386
4387 bswap_phdr(phdr, 1);
4388 d->phdr = phdr + 1;
4389 return 0;
4390 }
4391
wmr_write_region(void * opaque,vaddr start,vaddr end,int flags)4392 static int wmr_write_region(void *opaque, vaddr start,
4393 vaddr end, int flags)
4394 {
4395 int fd = *(int *)opaque;
4396 size_t size = vma_dump_size(start, end, flags);
4397
4398 if (!size) {
4399 return 0;
4400 }
4401 return dump_write(fd, g2h_untagged(start), size);
4402 }
4403
4404 /*
4405 * Write out ELF coredump.
4406 *
4407 * See documentation of ELF object file format in:
4408 * http://www.caldera.com/developers/devspecs/gabi41.pdf
4409 *
4410 * Coredump format in linux is following:
4411 *
4412 * 0 +----------------------+ \
4413 * | ELF header | ET_CORE |
4414 * +----------------------+ |
4415 * | ELF program headers | |--- headers
4416 * | - NOTE section | |
4417 * | - PT_LOAD sections | |
4418 * +----------------------+ /
4419 * | NOTEs: |
4420 * | - NT_PRSTATUS |
4421 * | - NT_PRSINFO |
4422 * | - NT_AUXV |
4423 * +----------------------+ <-- aligned to target page
4424 * | Process memory dump |
4425 * : :
4426 * . .
4427 * : :
4428 * | |
4429 * +----------------------+
4430 *
4431 * NT_PRSTATUS -> struct elf_prstatus (per thread)
4432 * NT_PRSINFO -> struct elf_prpsinfo
4433 * NT_AUXV is array of { type, value } pairs (see fill_auxv_note()).
4434 *
4435 * Format follows System V format as close as possible. Current
4436 * version limitations are as follows:
4437 * - no floating point registers are dumped
4438 *
4439 * Function returns 0 in case of success, negative errno otherwise.
4440 *
4441 * TODO: make this work also during runtime: it should be
4442 * possible to force coredump from running process and then
4443 * continue processing. For example qemu could set up SIGUSR2
4444 * handler (provided that target process haven't registered
4445 * handler for that) that does the dump when signal is received.
4446 */
elf_core_dump(int signr,const CPUArchState * env)4447 static int elf_core_dump(int signr, const CPUArchState *env)
4448 {
4449 const CPUState *cpu = env_cpu_const(env);
4450 const TaskState *ts = (const TaskState *)get_task_state((CPUState *)cpu);
4451 struct rlimit dumpsize;
4452 CountAndSizeRegions css;
4453 off_t offset, note_offset, data_offset;
4454 size_t note_size;
4455 int cpus, ret;
4456 int fd = -1;
4457 CPUState *cpu_iter;
4458
4459 if (prctl(PR_GET_DUMPABLE) == 0) {
4460 return 0;
4461 }
4462
4463 if (getrlimit(RLIMIT_CORE, &dumpsize) < 0 || dumpsize.rlim_cur == 0) {
4464 return 0;
4465 }
4466
4467 cpu_list_lock();
4468 mmap_lock();
4469
4470 /* By unprotecting, we merge vmas that might be split. */
4471 walk_memory_regions(NULL, wmr_page_unprotect_regions);
4472
4473 /*
4474 * Walk through target process memory mappings and
4475 * set up structure containing this information.
4476 */
4477 memset(&css, 0, sizeof(css));
4478 walk_memory_regions(&css, wmr_count_and_size_regions);
4479
4480 cpus = 0;
4481 CPU_FOREACH(cpu_iter) {
4482 cpus++;
4483 }
4484
4485 offset = sizeof(struct elfhdr);
4486 offset += (css.count + 1) * sizeof(struct elf_phdr);
4487 note_offset = offset;
4488
4489 offset += size_note("CORE", ts->info->auxv_len);
4490 offset += size_note("CORE", sizeof(struct target_elf_prpsinfo));
4491 offset += size_note("CORE", sizeof(struct target_elf_prstatus)) * cpus;
4492 note_size = offset - note_offset;
4493 data_offset = ROUND_UP(offset, ELF_EXEC_PAGESIZE);
4494
4495 /* Do not dump if the corefile size exceeds the limit. */
4496 if (dumpsize.rlim_cur != RLIM_INFINITY
4497 && dumpsize.rlim_cur < data_offset + css.size) {
4498 errno = 0;
4499 goto out;
4500 }
4501
4502 {
4503 g_autofree char *corefile = core_dump_filename(ts);
4504 fd = open(corefile, O_WRONLY | O_CREAT | O_TRUNC,
4505 S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
4506 }
4507 if (fd < 0) {
4508 goto out;
4509 }
4510
4511 /*
4512 * There is a fair amount of alignment padding within the notes
4513 * as well as preceeding the process memory. Allocate a zeroed
4514 * block to hold it all. Write all of the headers directly into
4515 * this buffer and then write it out as a block.
4516 */
4517 {
4518 g_autofree void *header = g_malloc0(data_offset);
4519 FillRegionPhdr frp;
4520 void *hptr, *dptr;
4521
4522 /* Create elf file header. */
4523 hptr = header;
4524 fill_elf_header(hptr, css.count + 1, ELF_MACHINE, 0);
4525 hptr += sizeof(struct elfhdr);
4526
4527 /* Create elf program headers. */
4528 fill_elf_note_phdr(hptr, note_size, note_offset);
4529 hptr += sizeof(struct elf_phdr);
4530
4531 frp.phdr = hptr;
4532 frp.offset = data_offset;
4533 walk_memory_regions(&frp, wmr_fill_region_phdr);
4534 hptr = frp.phdr;
4535
4536 /* Create the notes. */
4537 dptr = fill_note(&hptr, NT_AUXV, "CORE", ts->info->auxv_len);
4538 fill_auxv_note(dptr, ts);
4539
4540 dptr = fill_note(&hptr, NT_PRPSINFO, "CORE",
4541 sizeof(struct target_elf_prpsinfo));
4542 fill_prpsinfo_note(dptr, ts);
4543
4544 CPU_FOREACH(cpu_iter) {
4545 dptr = fill_note(&hptr, NT_PRSTATUS, "CORE",
4546 sizeof(struct target_elf_prstatus));
4547 fill_prstatus_note(dptr, cpu_iter, cpu_iter == cpu ? signr : 0);
4548 }
4549
4550 if (dump_write(fd, header, data_offset) < 0) {
4551 goto out;
4552 }
4553 }
4554
4555 /*
4556 * Finally write process memory into the corefile as well.
4557 */
4558 if (walk_memory_regions(&fd, wmr_write_region) < 0) {
4559 goto out;
4560 }
4561 errno = 0;
4562
4563 out:
4564 ret = -errno;
4565 mmap_unlock();
4566 cpu_list_unlock();
4567 if (fd >= 0) {
4568 close(fd);
4569 }
4570 return ret;
4571 }
4572 #endif /* USE_ELF_CORE_DUMP */
4573
do_init_thread(struct target_pt_regs * regs,struct image_info * infop)4574 void do_init_thread(struct target_pt_regs *regs, struct image_info *infop)
4575 {
4576 init_thread(regs, infop);
4577 }
4578