xref: /openbmc/linux/drivers/video/fbdev/offb.c (revision a5cd280b)
1 /*
2  *  linux/drivers/video/offb.c -- Open Firmware based frame buffer device
3  *
4  *	Copyright (C) 1997 Geert Uytterhoeven
5  *
6  *  This driver is partly based on the PowerMac console driver:
7  *
8  *	Copyright (C) 1996 Paul Mackerras
9  *
10  *  This file is subject to the terms and conditions of the GNU General Public
11  *  License. See the file COPYING in the main directory of this archive for
12  *  more details.
13  */
14 
15 #include <linux/aperture.h>
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/string.h>
20 #include <linux/mm.h>
21 #include <linux/vmalloc.h>
22 #include <linux/delay.h>
23 #include <linux/of.h>
24 #include <linux/of_address.h>
25 #include <linux/interrupt.h>
26 #include <linux/fb.h>
27 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/pci.h>
30 #include <linux/platform_device.h>
31 #include <asm/io.h>
32 
33 #ifdef CONFIG_PPC32
34 #include <asm/bootx.h>
35 #endif
36 
37 #include "macmodes.h"
38 
39 /* Supported palette hacks */
40 enum {
41 	cmap_unknown,
42 	cmap_simple,		/* ATI Mach64 */
43 	cmap_r128,		/* ATI Rage128 */
44 	cmap_M3A,		/* ATI Rage Mobility M3 Head A */
45 	cmap_M3B,		/* ATI Rage Mobility M3 Head B */
46 	cmap_radeon,		/* ATI Radeon */
47 	cmap_gxt2000,		/* IBM GXT2000 */
48 	cmap_avivo,		/* ATI R5xx */
49 	cmap_qemu,		/* qemu vga */
50 };
51 
52 struct offb_par {
53 	volatile void __iomem *cmap_adr;
54 	volatile void __iomem *cmap_data;
55 	int cmap_type;
56 	int blanked;
57 	u32 pseudo_palette[16];
58 	resource_size_t base;
59 	resource_size_t size;
60 };
61 
62 #ifdef CONFIG_PPC32
63 extern boot_infos_t *boot_infos;
64 #endif
65 
66 /* Definitions used by the Avivo palette hack */
67 #define AVIVO_DC_LUT_RW_SELECT                  0x6480
68 #define AVIVO_DC_LUT_RW_MODE                    0x6484
69 #define AVIVO_DC_LUT_RW_INDEX                   0x6488
70 #define AVIVO_DC_LUT_SEQ_COLOR                  0x648c
71 #define AVIVO_DC_LUT_PWL_DATA                   0x6490
72 #define AVIVO_DC_LUT_30_COLOR                   0x6494
73 #define AVIVO_DC_LUT_READ_PIPE_SELECT           0x6498
74 #define AVIVO_DC_LUT_WRITE_EN_MASK              0x649c
75 #define AVIVO_DC_LUT_AUTOFILL                   0x64a0
76 
77 #define AVIVO_DC_LUTA_CONTROL                   0x64c0
78 #define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE         0x64c4
79 #define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN        0x64c8
80 #define AVIVO_DC_LUTA_BLACK_OFFSET_RED          0x64cc
81 #define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE         0x64d0
82 #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN        0x64d4
83 #define AVIVO_DC_LUTA_WHITE_OFFSET_RED          0x64d8
84 
85 #define AVIVO_DC_LUTB_CONTROL                   0x6cc0
86 #define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE         0x6cc4
87 #define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN        0x6cc8
88 #define AVIVO_DC_LUTB_BLACK_OFFSET_RED          0x6ccc
89 #define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE         0x6cd0
90 #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN        0x6cd4
91 #define AVIVO_DC_LUTB_WHITE_OFFSET_RED          0x6cd8
92 
93     /*
94      *  Set a single color register. The values supplied are already
95      *  rounded down to the hardware's capabilities (according to the
96      *  entries in the var structure). Return != 0 for invalid regno.
97      */
98 
offb_setcolreg(u_int regno,u_int red,u_int green,u_int blue,u_int transp,struct fb_info * info)99 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
100 			  u_int transp, struct fb_info *info)
101 {
102 	struct offb_par *par = (struct offb_par *) info->par;
103 
104 	if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
105 		u32 *pal = info->pseudo_palette;
106 		u32 cr = red >> (16 - info->var.red.length);
107 		u32 cg = green >> (16 - info->var.green.length);
108 		u32 cb = blue >> (16 - info->var.blue.length);
109 		u32 value;
110 
111 		if (regno >= 16)
112 			return -EINVAL;
113 
114 		value = (cr << info->var.red.offset) |
115 			(cg << info->var.green.offset) |
116 			(cb << info->var.blue.offset);
117 		if (info->var.transp.length > 0) {
118 			u32 mask = (1 << info->var.transp.length) - 1;
119 			mask <<= info->var.transp.offset;
120 			value |= mask;
121 		}
122 		pal[regno] = value;
123 		return 0;
124 	}
125 
126 	if (regno > 255)
127 		return -EINVAL;
128 
129 	red >>= 8;
130 	green >>= 8;
131 	blue >>= 8;
132 
133 	if (!par->cmap_adr)
134 		return 0;
135 
136 	switch (par->cmap_type) {
137 	case cmap_simple:
138 		writeb(regno, par->cmap_adr);
139 		writeb(red, par->cmap_data);
140 		writeb(green, par->cmap_data);
141 		writeb(blue, par->cmap_data);
142 		break;
143 	case cmap_M3A:
144 		/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
145 		out_le32(par->cmap_adr + 0x58,
146 			 in_le32(par->cmap_adr + 0x58) & ~0x20);
147 		fallthrough;
148 	case cmap_r128:
149 		/* Set palette index & data */
150 		out_8(par->cmap_adr + 0xb0, regno);
151 		out_le32(par->cmap_adr + 0xb4,
152 			 (red << 16 | green << 8 | blue));
153 		break;
154 	case cmap_M3B:
155 		/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
156 		out_le32(par->cmap_adr + 0x58,
157 			 in_le32(par->cmap_adr + 0x58) | 0x20);
158 		/* Set palette index & data */
159 		out_8(par->cmap_adr + 0xb0, regno);
160 		out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
161 		break;
162 	case cmap_radeon:
163 		/* Set palette index & data (could be smarter) */
164 		out_8(par->cmap_adr + 0xb0, regno);
165 		out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
166 		break;
167 	case cmap_gxt2000:
168 		out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
169 			 (red << 16 | green << 8 | blue));
170 		break;
171 	case cmap_avivo:
172 		/* Write to both LUTs for now */
173 		writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
174 		writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
175 		writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
176 		       par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
177 		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
178 		writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
179 		writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
180 		       par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
181 		break;
182 	}
183 
184 	return 0;
185 }
186 
187     /*
188      *  Blank the display.
189      */
190 
offb_blank(int blank,struct fb_info * info)191 static int offb_blank(int blank, struct fb_info *info)
192 {
193 	struct offb_par *par = (struct offb_par *) info->par;
194 	int i, j;
195 
196 	if (!par->cmap_adr)
197 		return 0;
198 
199 	if (!par->blanked)
200 		if (!blank)
201 			return 0;
202 
203 	par->blanked = blank;
204 
205 	if (blank)
206 		for (i = 0; i < 256; i++) {
207 			switch (par->cmap_type) {
208 			case cmap_simple:
209 				writeb(i, par->cmap_adr);
210 				for (j = 0; j < 3; j++)
211 					writeb(0, par->cmap_data);
212 				break;
213 			case cmap_M3A:
214 				/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
215 				out_le32(par->cmap_adr + 0x58,
216 					 in_le32(par->cmap_adr + 0x58) & ~0x20);
217 				fallthrough;
218 			case cmap_r128:
219 				/* Set palette index & data */
220 				out_8(par->cmap_adr + 0xb0, i);
221 				out_le32(par->cmap_adr + 0xb4, 0);
222 				break;
223 			case cmap_M3B:
224 				/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
225 				out_le32(par->cmap_adr + 0x58,
226 					 in_le32(par->cmap_adr + 0x58) | 0x20);
227 				/* Set palette index & data */
228 				out_8(par->cmap_adr + 0xb0, i);
229 				out_le32(par->cmap_adr + 0xb4, 0);
230 				break;
231 			case cmap_radeon:
232 				out_8(par->cmap_adr + 0xb0, i);
233 				out_le32(par->cmap_adr + 0xb4, 0);
234 				break;
235 			case cmap_gxt2000:
236 				out_le32(((unsigned __iomem *) par->cmap_adr) + i,
237 					 0);
238 				break;
239 			case cmap_avivo:
240 				writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
241 				writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
242 				writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
243 				writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
244 				writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
245 				writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
246 				break;
247 			}
248 	} else
249 		fb_set_cmap(&info->cmap, info);
250 	return 0;
251 }
252 
offb_set_par(struct fb_info * info)253 static int offb_set_par(struct fb_info *info)
254 {
255 	struct offb_par *par = (struct offb_par *) info->par;
256 
257 	/* On avivo, initialize palette control */
258 	if (par->cmap_type == cmap_avivo) {
259 		writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
260 		writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
261 		writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
262 		writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
263 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
264 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
265 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
266 		writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
267 		writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
268 		writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
269 		writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
270 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
271 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
272 		writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
273 		writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
274 		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
275 		writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
276 		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
277 		writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
278 		writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
279 	}
280 	return 0;
281 }
282 
offb_destroy(struct fb_info * info)283 static void offb_destroy(struct fb_info *info)
284 {
285 	struct offb_par *par = info->par;
286 
287 	if (info->screen_base)
288 		iounmap(info->screen_base);
289 	release_mem_region(par->base, par->size);
290 	fb_dealloc_cmap(&info->cmap);
291 	framebuffer_release(info);
292 }
293 
294 static const struct fb_ops offb_ops = {
295 	.owner		= THIS_MODULE,
296 	FB_DEFAULT_IOMEM_OPS,
297 	.fb_destroy	= offb_destroy,
298 	.fb_setcolreg	= offb_setcolreg,
299 	.fb_set_par	= offb_set_par,
300 	.fb_blank	= offb_blank,
301 };
302 
offb_map_reg(struct device_node * np,int index,unsigned long offset,unsigned long size)303 static void __iomem *offb_map_reg(struct device_node *np, int index,
304 				  unsigned long offset, unsigned long size)
305 {
306 	const __be32 *addrp;
307 	u64 asize, taddr;
308 	unsigned int flags;
309 
310 	addrp = of_get_pci_address(np, index, &asize, &flags);
311 	if (addrp == NULL)
312 		addrp = of_get_address(np, index, &asize, &flags);
313 	if (addrp == NULL)
314 		return NULL;
315 	if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
316 		return NULL;
317 	if ((offset + size) > asize)
318 		return NULL;
319 	taddr = of_translate_address(np, addrp);
320 	if (taddr == OF_BAD_ADDR)
321 		return NULL;
322 	return ioremap(taddr + offset, size);
323 }
324 
offb_init_palette_hacks(struct fb_info * info,struct device_node * dp,unsigned long address)325 static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
326 				    unsigned long address)
327 {
328 	struct offb_par *par = (struct offb_par *) info->par;
329 
330 	if (of_node_name_prefix(dp, "ATY,Rage128")) {
331 		par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
332 		if (par->cmap_adr)
333 			par->cmap_type = cmap_r128;
334 	} else if (of_node_name_prefix(dp, "ATY,RageM3pA") ||
335 		   of_node_name_prefix(dp, "ATY,RageM3p12A")) {
336 		par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
337 		if (par->cmap_adr)
338 			par->cmap_type = cmap_M3A;
339 	} else if (of_node_name_prefix(dp, "ATY,RageM3pB")) {
340 		par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
341 		if (par->cmap_adr)
342 			par->cmap_type = cmap_M3B;
343 	} else if (of_node_name_prefix(dp, "ATY,Rage6")) {
344 		par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
345 		if (par->cmap_adr)
346 			par->cmap_type = cmap_radeon;
347 	} else if (of_node_name_prefix(dp, "ATY,")) {
348 		unsigned long base = address & 0xff000000UL;
349 		par->cmap_adr =
350 			ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
351 		par->cmap_data = par->cmap_adr + 1;
352 		par->cmap_type = cmap_simple;
353 	} else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
354 			  of_device_is_compatible(dp, "pci1014,21c"))) {
355 		par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
356 		if (par->cmap_adr)
357 			par->cmap_type = cmap_gxt2000;
358 	} else if (of_node_name_prefix(dp, "vga,Display-")) {
359 		/* Look for AVIVO initialized by SLOF */
360 		struct device_node *pciparent = of_get_parent(dp);
361 		const u32 *vid, *did;
362 		vid = of_get_property(pciparent, "vendor-id", NULL);
363 		did = of_get_property(pciparent, "device-id", NULL);
364 		/* This will match most R5xx */
365 		if (vid && did && *vid == 0x1002 &&
366 		    ((*did >= 0x7100 && *did < 0x7800) ||
367 		     (*did >= 0x9400))) {
368 			par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
369 			if (par->cmap_adr)
370 				par->cmap_type = cmap_avivo;
371 		}
372 		of_node_put(pciparent);
373 	} else if (dp && of_device_is_compatible(dp, "qemu,std-vga")) {
374 #ifdef __BIG_ENDIAN
375 		const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
376 #else
377 		const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 };
378 #endif
379 		u64 io_addr = of_translate_address(dp, io_of_addr);
380 		if (io_addr != OF_BAD_ADDR) {
381 			par->cmap_adr = ioremap(io_addr + 0x3c8, 2);
382 			if (par->cmap_adr) {
383 				par->cmap_type = cmap_simple;
384 				par->cmap_data = par->cmap_adr + 1;
385 			}
386 		}
387 	}
388 	info->fix.visual = (par->cmap_type != cmap_unknown) ?
389 		FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
390 }
391 
offb_init_fb(struct platform_device * parent,const char * name,int width,int height,int depth,int pitch,unsigned long address,int foreign_endian,struct device_node * dp)392 static void offb_init_fb(struct platform_device *parent, const char *name,
393 			 int width, int height, int depth,
394 			 int pitch, unsigned long address,
395 			 int foreign_endian, struct device_node *dp)
396 {
397 	unsigned long res_size = pitch * height;
398 	unsigned long res_start = address;
399 	struct fb_fix_screeninfo *fix;
400 	struct fb_var_screeninfo *var;
401 	struct fb_info *info;
402 	struct offb_par *par;
403 
404 	if (!request_mem_region(res_start, res_size, "offb"))
405 		return;
406 
407 	printk(KERN_INFO
408 	       "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
409 	       width, height, name, address, depth, pitch);
410 	if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
411 		printk(KERN_ERR "%pOF: can't use depth = %d\n", dp, depth);
412 		release_mem_region(res_start, res_size);
413 		return;
414 	}
415 
416 	info = framebuffer_alloc(sizeof(*par), &parent->dev);
417 	if (!info) {
418 		release_mem_region(res_start, res_size);
419 		return;
420 	}
421 	platform_set_drvdata(parent, info);
422 	par = info->par;
423 	fix = &info->fix;
424 	var = &info->var;
425 
426 	if (name) {
427 		strcpy(fix->id, "OFfb ");
428 		strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
429 		fix->id[sizeof(fix->id) - 1] = '\0';
430 	} else
431 		snprintf(fix->id, sizeof(fix->id), "OFfb %pOFn", dp);
432 
433 
434 	var->xres = var->xres_virtual = width;
435 	var->yres = var->yres_virtual = height;
436 	fix->line_length = pitch;
437 
438 	fix->smem_start = address;
439 	fix->smem_len = pitch * height;
440 	fix->type = FB_TYPE_PACKED_PIXELS;
441 	fix->type_aux = 0;
442 
443 	par->cmap_type = cmap_unknown;
444 	if (depth == 8)
445 		offb_init_palette_hacks(info, dp, address);
446 	else
447 		fix->visual = FB_VISUAL_TRUECOLOR;
448 
449 	var->xoffset = var->yoffset = 0;
450 	switch (depth) {
451 	case 8:
452 		var->bits_per_pixel = 8;
453 		var->red.offset = 0;
454 		var->red.length = 8;
455 		var->green.offset = 0;
456 		var->green.length = 8;
457 		var->blue.offset = 0;
458 		var->blue.length = 8;
459 		var->transp.offset = 0;
460 		var->transp.length = 0;
461 		break;
462 	case 15:		/* RGB 555 */
463 		var->bits_per_pixel = 16;
464 		var->red.offset = 10;
465 		var->red.length = 5;
466 		var->green.offset = 5;
467 		var->green.length = 5;
468 		var->blue.offset = 0;
469 		var->blue.length = 5;
470 		var->transp.offset = 0;
471 		var->transp.length = 0;
472 		break;
473 	case 16:		/* RGB 565 */
474 		var->bits_per_pixel = 16;
475 		var->red.offset = 11;
476 		var->red.length = 5;
477 		var->green.offset = 5;
478 		var->green.length = 6;
479 		var->blue.offset = 0;
480 		var->blue.length = 5;
481 		var->transp.offset = 0;
482 		var->transp.length = 0;
483 		break;
484 	case 32:		/* RGB 888 */
485 		var->bits_per_pixel = 32;
486 		var->red.offset = 16;
487 		var->red.length = 8;
488 		var->green.offset = 8;
489 		var->green.length = 8;
490 		var->blue.offset = 0;
491 		var->blue.length = 8;
492 		var->transp.offset = 24;
493 		var->transp.length = 8;
494 		break;
495 	}
496 	var->red.msb_right = var->green.msb_right = var->blue.msb_right =
497 	    var->transp.msb_right = 0;
498 	var->grayscale = 0;
499 	var->nonstd = 0;
500 	var->activate = 0;
501 	var->height = var->width = -1;
502 	var->pixclock = 10000;
503 	var->left_margin = var->right_margin = 16;
504 	var->upper_margin = var->lower_margin = 16;
505 	var->hsync_len = var->vsync_len = 8;
506 	var->sync = 0;
507 	var->vmode = FB_VMODE_NONINTERLACED;
508 
509 	par->base = address;
510 	par->size = fix->smem_len;
511 
512 	info->fbops = &offb_ops;
513 	info->screen_base = ioremap(address, fix->smem_len);
514 	info->pseudo_palette = par->pseudo_palette;
515 	info->flags = foreign_endian;
516 
517 	fb_alloc_cmap(&info->cmap, 256, 0);
518 
519 	if (devm_aperture_acquire_for_platform_device(parent, par->base, par->size) < 0)
520 		goto out_err;
521 	if (register_framebuffer(info) < 0)
522 		goto out_err;
523 
524 	fb_info(info, "Open Firmware frame buffer device on %pOF\n", dp);
525 	return;
526 
527 out_err:
528 	fb_dealloc_cmap(&info->cmap);
529 	iounmap(info->screen_base);
530 	iounmap(par->cmap_adr);
531 	par->cmap_adr = NULL;
532 	framebuffer_release(info);
533 	release_mem_region(res_start, res_size);
534 }
535 
536 
offb_init_nodriver(struct platform_device * parent,struct device_node * dp,int no_real_node)537 static void offb_init_nodriver(struct platform_device *parent, struct device_node *dp,
538 			       int no_real_node)
539 {
540 	unsigned int len;
541 	int i, width = 640, height = 480, depth = 8, pitch = 640;
542 	unsigned int flags, rsize, addr_prop = 0;
543 	unsigned long max_size = 0;
544 	u64 rstart, address = OF_BAD_ADDR;
545 	const __be32 *pp, *addrp, *up;
546 	u64 asize;
547 	int foreign_endian = 0;
548 
549 #ifdef __BIG_ENDIAN
550 	if (of_property_read_bool(dp, "little-endian"))
551 		foreign_endian = FBINFO_FOREIGN_ENDIAN;
552 #else
553 	if (of_property_read_bool(dp, "big-endian"))
554 		foreign_endian = FBINFO_FOREIGN_ENDIAN;
555 #endif
556 
557 	pp = of_get_property(dp, "linux,bootx-depth", &len);
558 	if (pp == NULL)
559 		pp = of_get_property(dp, "depth", &len);
560 	if (pp && len == sizeof(u32))
561 		depth = be32_to_cpup(pp);
562 
563 	pp = of_get_property(dp, "linux,bootx-width", &len);
564 	if (pp == NULL)
565 		pp = of_get_property(dp, "width", &len);
566 	if (pp && len == sizeof(u32))
567 		width = be32_to_cpup(pp);
568 
569 	pp = of_get_property(dp, "linux,bootx-height", &len);
570 	if (pp == NULL)
571 		pp = of_get_property(dp, "height", &len);
572 	if (pp && len == sizeof(u32))
573 		height = be32_to_cpup(pp);
574 
575 	pp = of_get_property(dp, "linux,bootx-linebytes", &len);
576 	if (pp == NULL)
577 		pp = of_get_property(dp, "linebytes", &len);
578 	if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
579 		pitch = be32_to_cpup(pp);
580 	else
581 		pitch = width * ((depth + 7) / 8);
582 
583 	rsize = (unsigned long)pitch * (unsigned long)height;
584 
585 	/* Ok, now we try to figure out the address of the framebuffer.
586 	 *
587 	 * Unfortunately, Open Firmware doesn't provide a standard way to do
588 	 * so. All we can do is a dodgy heuristic that happens to work in
589 	 * practice. On most machines, the "address" property contains what
590 	 * we need, though not on Matrox cards found in IBM machines. What I've
591 	 * found that appears to give good results is to go through the PCI
592 	 * ranges and pick one that is both big enough and if possible encloses
593 	 * the "address" property. If none match, we pick the biggest
594 	 */
595 	up = of_get_property(dp, "linux,bootx-addr", &len);
596 	if (up == NULL)
597 		up = of_get_property(dp, "address", &len);
598 	if (up && len == sizeof(u32))
599 		addr_prop = *up;
600 
601 	/* Hack for when BootX is passing us */
602 	if (no_real_node)
603 		goto skip_addr;
604 
605 	for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
606 		     != NULL; i++) {
607 		int match_addrp = 0;
608 
609 		if (!(flags & IORESOURCE_MEM))
610 			continue;
611 		if (asize < rsize)
612 			continue;
613 		rstart = of_translate_address(dp, addrp);
614 		if (rstart == OF_BAD_ADDR)
615 			continue;
616 		if (addr_prop && (rstart <= addr_prop) &&
617 		    ((rstart + asize) >= (addr_prop + rsize)))
618 			match_addrp = 1;
619 		if (match_addrp) {
620 			address = addr_prop;
621 			break;
622 		}
623 		if (rsize > max_size) {
624 			max_size = rsize;
625 			address = OF_BAD_ADDR;
626  		}
627 
628 		if (address == OF_BAD_ADDR)
629 			address = rstart;
630 	}
631  skip_addr:
632 	if (address == OF_BAD_ADDR && addr_prop)
633 		address = (u64)addr_prop;
634 	if (address != OF_BAD_ADDR) {
635 #ifdef CONFIG_PCI
636 		const __be32 *vidp, *didp;
637 		u32 vid, did;
638 		struct pci_dev *pdev;
639 
640 		vidp = of_get_property(dp, "vendor-id", NULL);
641 		didp = of_get_property(dp, "device-id", NULL);
642 		if (vidp && didp) {
643 			vid = be32_to_cpup(vidp);
644 			did = be32_to_cpup(didp);
645 			pdev = pci_get_device(vid, did, NULL);
646 			if (!pdev || pci_enable_device(pdev))
647 				return;
648 		}
649 #endif
650 		/* kludge for valkyrie */
651 		if (of_node_name_eq(dp, "valkyrie"))
652 			address += 0x1000;
653 		offb_init_fb(parent, no_real_node ? "bootx" : NULL,
654 			     width, height, depth, pitch, address,
655 			     foreign_endian, no_real_node ? NULL : dp);
656 	}
657 }
658 
offb_remove(struct platform_device * pdev)659 static void offb_remove(struct platform_device *pdev)
660 {
661 	struct fb_info *info = platform_get_drvdata(pdev);
662 
663 	if (info)
664 		unregister_framebuffer(info);
665 }
666 
offb_probe_bootx_noscreen(struct platform_device * pdev)667 static int offb_probe_bootx_noscreen(struct platform_device *pdev)
668 {
669 	offb_init_nodriver(pdev, of_chosen, 1);
670 
671 	return 0;
672 }
673 
674 static struct platform_driver offb_driver_bootx_noscreen = {
675 	.driver = {
676 		.name = "bootx-noscreen",
677 	},
678 	.probe = offb_probe_bootx_noscreen,
679 	.remove_new = offb_remove,
680 };
681 
offb_probe_display(struct platform_device * pdev)682 static int offb_probe_display(struct platform_device *pdev)
683 {
684 	offb_init_nodriver(pdev, pdev->dev.of_node, 0);
685 
686 	return 0;
687 }
688 
689 static const struct of_device_id offb_of_match_display[] = {
690 	{ .compatible = "display", },
691 	{ },
692 };
693 MODULE_DEVICE_TABLE(of, offb_of_match_display);
694 
695 static struct platform_driver offb_driver_display = {
696 	.driver = {
697 		.name = "of-display",
698 		.of_match_table = offb_of_match_display,
699 	},
700 	.probe = offb_probe_display,
701 	.remove_new = offb_remove,
702 };
703 
offb_init(void)704 static int __init offb_init(void)
705 {
706 	if (fb_get_options("offb", NULL))
707 		return -ENODEV;
708 
709 	platform_driver_register(&offb_driver_bootx_noscreen);
710 	platform_driver_register(&offb_driver_display);
711 
712 	return 0;
713 }
714 module_init(offb_init);
715 
offb_exit(void)716 static void __exit offb_exit(void)
717 {
718 	platform_driver_unregister(&offb_driver_display);
719 	platform_driver_unregister(&offb_driver_bootx_noscreen);
720 }
721 module_exit(offb_exit);
722 
723 MODULE_LICENSE("GPL");
724