xref: /openbmc/linux/arch/arm/mach-pxa/generic.c (revision e6acc406)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  linux/arch/arm/mach-pxa/generic.c
4  *
5  *  Author:	Nicolas Pitre
6  *  Created:	Jun 15, 2001
7  *  Copyright:	MontaVista Software Inc.
8  *
9  * Code common to all PXA machines.
10  *
11  * Since this file should be linked before any other machine specific file,
12  * the __initcall() here will be executed first.  This serves as default
13  * initialization stuff for PXA machines which can be overridden later if
14  * need be.
15  */
16 #include <linux/gpio.h>
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/soc/pxa/cpu.h>
21 #include <linux/soc/pxa/smemc.h>
22 #include <linux/clk/pxa.h>
23 
24 #include <asm/mach/map.h>
25 #include <asm/mach-types.h>
26 
27 #include "addr-map.h"
28 #include "irqs.h"
29 #include "reset.h"
30 #include "smemc.h"
31 #include "pxa3xx-regs.h"
32 
33 #include "generic.h"
34 #include <clocksource/pxa.h>
35 
clear_reset_status(unsigned int mask)36 void clear_reset_status(unsigned int mask)
37 {
38 	if (cpu_is_pxa2xx())
39 		pxa2xx_clear_reset_status(mask);
40 	else {
41 		/* RESET_STATUS_* has a 1:1 mapping with ARSR */
42 		ARSR = mask;
43 	}
44 }
45 
46 /*
47  * For non device-tree builds, keep legacy timer init
48  */
pxa_timer_init(void)49 void __init pxa_timer_init(void)
50 {
51 	if (cpu_is_pxa25x())
52 		pxa25x_clocks_init(io_p2v(0x41300000));
53 	if (cpu_is_pxa27x())
54 		pxa27x_clocks_init(io_p2v(0x41300000));
55 	if (cpu_is_pxa3xx())
56 		pxa3xx_clocks_init(io_p2v(0x41340000), io_p2v(0x41350000));
57 	pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000));
58 }
59 
pxa_smemc_set_pcmcia_timing(int sock,u32 mcmem,u32 mcatt,u32 mcio)60 void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio)
61 {
62 	__raw_writel(mcmem, MCMEM(sock));
63 	__raw_writel(mcatt, MCATT(sock));
64 	__raw_writel(mcio, MCIO(sock));
65 }
66 EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing);
67 
pxa_smemc_set_pcmcia_socket(int nr)68 void pxa_smemc_set_pcmcia_socket(int nr)
69 {
70 	switch (nr) {
71 	case 0:
72 		__raw_writel(0, MECR);
73 		break;
74 	case 1:
75 		/*
76 		 * We have at least one socket, so set MECR:CIT
77 		 * (Card Is There)
78 		 */
79 		__raw_writel(MECR_CIT, MECR);
80 		break;
81 	case 2:
82 		/* Set CIT and MECR:NOS (Number Of Sockets) */
83 		__raw_writel(MECR_CIT | MECR_NOS, MECR);
84 		break;
85 	}
86 }
87 EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket);
88 
pxa_smemc_get_mdrefr(void)89 void __iomem *pxa_smemc_get_mdrefr(void)
90 {
91 	return MDREFR;
92 }
93 
94 /*
95  * Intel PXA2xx internal register mapping.
96  *
97  * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
98  *       and cache flush area.
99  */
100 static struct map_desc common_io_desc[] __initdata = {
101   	{	/* Devs */
102 		.virtual	= (unsigned long)PERIPH_VIRT,
103 		.pfn		= __phys_to_pfn(PERIPH_PHYS),
104 		.length		= PERIPH_SIZE,
105 		.type		= MT_DEVICE
106 	}
107 };
108 
pxa_map_io(void)109 void __init pxa_map_io(void)
110 {
111 	debug_ll_io_init();
112 	iotable_init(ARRAY_AND_SIZE(common_io_desc));
113 }
114