1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
4 * Author: Matt McKee <mmckee@phytec.com>
5 *
6 * Copyright (C) 2022 PHYTEC Messtechnik GmbH
7 * Author: Wadim Egorov <w.egorov@phytec.de>
8 *
9 * Product homepage:
10 * https://www.phytec.com/product/phycore-am64x
11 */
12
13#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/leds/common.h>
15#include <dt-bindings/net/ti-dp83867.h>
16
17/ {
18	model = "PHYTEC phyCORE-AM64x";
19	compatible = "phytec,am64-phycore-som", "ti,am642";
20
21	aliases {
22		ethernet0 = &cpsw_port1;
23		mmc0 = &sdhci0;
24		rtc0 = &i2c_som_rtc;
25	};
26
27	memory@80000000 {
28		device_type = "memory";
29		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
30	};
31
32	reserved-memory {
33		#address-cells = <2>;
34		#size-cells = <2>;
35		ranges;
36
37		secure_ddr: optee@9e800000 {
38			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
39			alignment = <0x1000>;
40			no-map;
41		};
42	};
43
44	leds {
45		compatible = "gpio-leds";
46		pinctrl-names = "default";
47		pinctrl-0 = <&leds_pins_default>;
48
49		led-0 {
50			color = <LED_COLOR_ID_GREEN>;
51			gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
52			linux,default-trigger = "heartbeat";
53			function = LED_FUNCTION_HEARTBEAT;
54		};
55	};
56
57	vcc_5v0_som: regulator-vcc-5v0-som {
58		/* VIN / VCC_5V0_SOM */
59		compatible = "regulator-fixed";
60		regulator-name = "VCC_5V0_SOM";
61		regulator-min-microvolt = <5000000>;
62		regulator-max-microvolt = <5000000>;
63		regulator-always-on;
64		regulator-boot-on;
65	};
66};
67
68&main_pmx0 {
69	cpsw_mdio_pins_default: cpsw-mdio-default-pins {
70		pinctrl-single,pins = <
71			AM64X_IOPAD(0x01f8, PIN_INPUT, 4)	/* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
72			AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4)	/* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
73			AM64X_IOPAD(0x0100, PIN_OUTPUT, 7)	/* (V7) PRG1_PRU0_GPO18.GPIO0_63 */
74		>;
75	};
76
77	cpsw_rgmii1_pins_default: cpsw-rgmii1-default-pins {
78		pinctrl-single,pins = <
79			AM64X_IOPAD(0x0184, PIN_INPUT, 4)	/* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
80			AM64X_IOPAD(0x0188, PIN_INPUT, 4)	/* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
81			AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4)	/* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
82			AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4)	/* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
83			AM64X_IOPAD(0x01cc, PIN_INPUT, 4)	/* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
84			AM64X_IOPAD(0x0124, PIN_OUTPUT, 4)	/* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
85			AM64X_IOPAD(0x01d4, PIN_INPUT, 4)	/* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
86			AM64X_IOPAD(0x012c, PIN_OUTPUT, 4)	/* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
87			AM64X_IOPAD(0x01d8, PIN_INPUT, 4)	/* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
88			AM64X_IOPAD(0x0130, PIN_OUTPUT, 4)	/* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
89			AM64X_IOPAD(0x01f4, PIN_INPUT, 4)	/* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
90			AM64X_IOPAD(0x014c, PIN_OUTPUT, 4)	/* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
91			AM64X_IOPAD(0x0154, PIN_INPUT, 7)	/* (V12) PRG1_PRU1_GPO19.GPIO0_84 */
92		>;
93	};
94
95	eeprom_wp_pins_default: eeprom-wp-default-pins {
96		pinctrl-single,pins = <
97			AM64X_IOPAD(0x0208, PIN_OUTPUT, 7)	/* (D12) SPI0_CS0.GPIO1_42 */
98		>;
99	};
100
101	leds_pins_default: leds-default-pins {
102		pinctrl-single,pins = <
103			AM64X_IOPAD(0x0030, PIN_OUTPUT, 7)	/* (L18) OSPI0_CSn1.GPIO0_12 */
104		>;
105	};
106
107	main_i2c0_pins_default: main-i2c0-default-pins {
108		pinctrl-single,pins = <
109			AM64X_IOPAD(0x0260, PIN_INPUT, 0)	/* (A18) I2C0_SCL */
110			AM64X_IOPAD(0x0264, PIN_INPUT, 0)	/* (B18) I2C0_SDA */
111		>;
112	};
113
114	ospi0_pins_default: ospi0-default-pins {
115		pinctrl-single,pins = <
116			AM64X_IOPAD(0x0000, PIN_OUTPUT, 0)	/* (N20) OSPI0_CLK */
117			AM64X_IOPAD(0x0008, PIN_INPUT, 0)	/* (N19) OSPI0_DQS */
118			AM64X_IOPAD(0x000c, PIN_INPUT, 0)	/* (M19) OSPI0_D0 */
119			AM64X_IOPAD(0x0010, PIN_INPUT, 0)	/* (M18) OSPI0_D1 */
120			AM64X_IOPAD(0x0014, PIN_INPUT, 0)	/* (M20) OSPI0_D2 */
121			AM64X_IOPAD(0x0018, PIN_INPUT, 0)	/* (M21) OSPI0_D3 */
122			AM64X_IOPAD(0x001c, PIN_INPUT, 0)	/* (P21) OSPI0_D4 */
123			AM64X_IOPAD(0x0020, PIN_INPUT, 0)	/* (P20) OSPI0_D5 */
124			AM64X_IOPAD(0x0024, PIN_INPUT, 0)	/* (N18) OSPI0_D6 */
125			AM64X_IOPAD(0x0028, PIN_INPUT, 0)	/* (M17) OSPI0_D7 */
126			AM64X_IOPAD(0x002c, PIN_OUTPUT, 0)	/* (L19) OSPI0_CSn0 */
127		>;
128	};
129};
130
131&cpsw3g {
132	pinctrl-names = "default";
133	pinctrl-0 = <&cpsw_rgmii1_pins_default>;
134};
135
136&cpsw3g_mdio {
137	status = "okay";
138	pinctrl-names = "default";
139	pinctrl-0 = <&cpsw_mdio_pins_default>;
140
141	cpsw3g_phy1: ethernet-phy@1 {
142		compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
143		reg = <1>;
144		interrupt-parent = <&main_gpio0>;
145		interrupts = <84 IRQ_TYPE_EDGE_FALLING>;
146		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
147		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
148		reset-gpios = <&main_gpio0 63 GPIO_ACTIVE_LOW>;
149		reset-assert-us = <1000>;
150		reset-deassert-us = <1000>;
151	};
152};
153
154&cpsw_port1 {
155	phy-mode = "rgmii-rxid";
156	phy-handle = <&cpsw3g_phy1>;
157};
158
159&cpsw_port2 {
160	status = "disabled";
161};
162
163&main_i2c0 {
164	status = "okay";
165	pinctrl-names = "default";
166	pinctrl-0 = <&main_i2c0_pins_default>;
167	clock-frequency = <400000>;
168
169	eeprom@50 {
170		compatible = "atmel,24c32";
171		pinctrl-names = "default";
172		pinctrl-0 = <&eeprom_wp_pins_default>;
173		pagesize = <32>;
174		reg = <0x50>;
175	};
176
177	i2c_som_rtc: rtc@52 {
178		compatible = "microcrystal,rv3028";
179		reg = <0x52>;
180	};
181};
182
183&ospi0 {
184	status = "okay";
185	pinctrl-names = "default";
186	pinctrl-0 = <&ospi0_pins_default>;
187
188	flash@0 {
189		compatible = "jedec,spi-nor";
190		reg = <0x0>;
191		spi-tx-bus-width = <8>;
192		spi-rx-bus-width = <8>;
193		spi-max-frequency = <25000000>;
194		cdns,tshsl-ns = <60>;
195		cdns,tsd2d-ns = <60>;
196		cdns,tchsh-ns = <60>;
197		cdns,tslch-ns = <60>;
198		cdns,read-delay = <0>;
199	};
200};
201
202&sdhci0 {
203	status = "okay";
204	bus-width = <8>;
205	non-removable;
206	ti,driver-strength-ohm = <50>;
207	disable-wp;
208	keep-power-in-suspend;
209};
210