1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * 4 * Congatec Conga-QEVAl board configuration file. 5 * 6 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 7 * Based on Freescale i.MX6Q Sabre Lite board configuration file. 8 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 9 * Leo Sartre, <lsartre@adeneo-embedded.com> 10 */ 11 12 #ifndef __CONFIG_CGTQMX6EVAL_H 13 #define __CONFIG_CGTQMX6EVAL_H 14 15 #include "mx6_common.h" 16 17 #define CONFIG_MACH_TYPE 4122 18 19 #ifdef CONFIG_SPL 20 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 21 #include "imx6_spl.h" 22 #endif 23 24 /* Size of malloc() pool */ 25 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 26 27 #define CONFIG_MXC_UART 28 #define CONFIG_MXC_UART_BASE UART2_BASE 29 30 /* MMC Configs */ 31 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 32 33 /* SPI NOR */ 34 #define CONFIG_SPI_FLASH_STMICRO 35 #define CONFIG_SPI_FLASH_SST 36 37 /* Thermal support */ 38 #define CONFIG_IMX_THERMAL 39 40 /* I2C Configs */ 41 #define CONFIG_SYS_I2C 42 #define CONFIG_SYS_I2C_MXC 43 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 44 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 45 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 46 #define CONFIG_SYS_I2C_SPEED 100000 47 48 /* PMIC */ 49 #define CONFIG_POWER 50 #define CONFIG_POWER_I2C 51 #define CONFIG_POWER_PFUZE100 52 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 53 54 /* USB Configs */ 55 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 56 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 57 #define CONFIG_MXC_USB_FLAGS 0 58 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ 59 60 #define CONFIG_USBD_HS 61 62 /* Framebuffer */ 63 #define CONFIG_VIDEO_IPUV3 64 #define CONFIG_VIDEO_BMP_RLE8 65 #define CONFIG_SPLASH_SCREEN 66 #define CONFIG_SPLASH_SCREEN_ALIGN 67 #define CONFIG_BMP_16BPP 68 #define CONFIG_VIDEO_LOGO 69 #define CONFIG_VIDEO_BMP_LOGO 70 #define CONFIG_IMX_HDMI 71 72 /* SATA */ 73 #define CONFIG_SYS_SATA_MAX_DEVICE 1 74 #define CONFIG_DWC_AHSATA_PORT_ID 0 75 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 76 #define CONFIG_LBA48 77 78 /* Ethernet */ 79 #define CONFIG_FEC_MXC 80 #define IMX_FEC_BASE ENET_BASE_ADDR 81 #define CONFIG_FEC_XCV_TYPE RGMII 82 #define CONFIG_ETHPRIME "FEC" 83 #define CONFIG_FEC_MXC_PHYADDR 6 84 #define CONFIG_PHY_ATHEROS 85 86 /* Command definition */ 87 88 #define CONFIG_MXC_UART_BASE UART2_BASE 89 #define CONSOLE_DEV "ttymxc1" 90 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 91 #define CONFIG_SYS_MMC_ENV_DEV 0 92 93 #define CONFIG_EXTRA_ENV_SETTINGS \ 94 "script=boot.scr\0" \ 95 "image=zImage\0" \ 96 "fdtfile=undefined\0" \ 97 "fdt_addr_r=0x18000000\0" \ 98 "boot_fdt=try\0" \ 99 "ip_dyn=yes\0" \ 100 "console=" CONSOLE_DEV "\0" \ 101 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \ 102 "dfu_alt_info_spl=spl raw 0x400\0" \ 103 "dfu_alt_info_img=u-boot raw 0x10000\0" \ 104 "dfu_alt_info=spl raw 0x400\0" \ 105 "bootm_size=0x10000000\0" \ 106 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 107 "mmcpart=1\0" \ 108 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 109 "update_sd_firmware=" \ 110 "if test ${ip_dyn} = yes; then " \ 111 "setenv get_cmd dhcp; " \ 112 "else " \ 113 "setenv get_cmd tftp; " \ 114 "fi; " \ 115 "if mmc dev ${mmcdev}; then " \ 116 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 117 "setexpr fw_sz ${filesize} / 0x200; " \ 118 "setexpr fw_sz ${fw_sz} + 1; " \ 119 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 120 "fi; " \ 121 "fi\0" \ 122 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 123 "root=${mmcroot}\0" \ 124 "loadbootscript=" \ 125 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 126 "bootscript=echo Running bootscript from mmc ...; " \ 127 "source\0" \ 128 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 129 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ 130 "mmcboot=echo Booting from mmc ...; " \ 131 "run mmcargs; " \ 132 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 133 "if run loadfdt; then " \ 134 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 135 "else " \ 136 "if test ${boot_fdt} = try; then " \ 137 "bootz; " \ 138 "else " \ 139 "echo WARN: Cannot load the DT; " \ 140 "fi; " \ 141 "fi; " \ 142 "else " \ 143 "bootz; " \ 144 "fi;\0" \ 145 "findfdt="\ 146 "if test $board_rev = MX6Q ; then " \ 147 "setenv fdtfile imx6q-qmx6.dtb; fi; " \ 148 "if test $board_rev = MX6DL ; then " \ 149 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \ 150 "if test $fdtfile = undefined; then " \ 151 "echo WARNING: Could not determine dtb to use; fi; \0" \ 152 "netargs=setenv bootargs console=${console},${baudrate} " \ 153 "root=/dev/nfs " \ 154 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 155 "netboot=echo Booting from net ...; " \ 156 "run netargs; " \ 157 "if test ${ip_dyn} = yes; then " \ 158 "setenv get_cmd dhcp; " \ 159 "else " \ 160 "setenv get_cmd tftp; " \ 161 "fi; " \ 162 "${get_cmd} ${image}; " \ 163 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 164 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ 165 "bootz ${loadaddr} - ${fdt_addr_r}; " \ 166 "else " \ 167 "if test ${boot_fdt} = try; then " \ 168 "bootz; " \ 169 "else " \ 170 "echo WARN: Cannot load the DT; " \ 171 "fi; " \ 172 "fi; " \ 173 "else " \ 174 "bootz; " \ 175 "fi;\0" \ 176 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\ 177 178 #define CONFIG_BOOTCOMMAND \ 179 "run spilock;" \ 180 "run findfdt; " \ 181 "mmc dev ${mmcdev};" \ 182 "if mmc rescan; then " \ 183 "if run loadbootscript; then " \ 184 "run bootscript; " \ 185 "else " \ 186 "if run loadimage; then " \ 187 "run mmcboot; " \ 188 "else run netboot; " \ 189 "fi; " \ 190 "fi; " \ 191 "else run netboot; fi" 192 193 #define CONFIG_SYS_MEMTEST_START 0x10000000 194 #define CONFIG_SYS_MEMTEST_END 0x10010000 195 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 196 197 /* Physical Memory Map */ 198 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 199 200 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 201 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 202 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 203 204 #define CONFIG_SYS_INIT_SP_OFFSET \ 205 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 206 #define CONFIG_SYS_INIT_SP_ADDR \ 207 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 208 209 /* Environment organization */ 210 #if defined (CONFIG_ENV_IS_IN_MMC) 211 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 212 #define CONFIG_SYS_MMC_ENV_DEV 0 213 #endif 214 215 #define CONFIG_ENV_SIZE (8 * 1024) 216 217 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) 218 #define CONFIG_ENV_OFFSET (768 * 1024) 219 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 220 #endif 221 222 #endif /* __CONFIG_CGTQMX6EVAL_H */ 223