xref: /openbmc/qemu/include/hw/scsi/esp.h (revision a56ac09f5c37f57059c2a2c5ae6aeff7f7241a84)
1 #ifndef QEMU_HW_ESP_H
2 #define QEMU_HW_ESP_H
3 
4 #include "hw/scsi/scsi.h"
5 #include "hw/sysbus.h"
6 #include "qemu/fifo8.h"
7 #include "qom/object.h"
8 
9 /* esp.c */
10 #define ESP_MAX_DEVS 7
11 typedef void (*ESPDMAMemoryReadWriteFunc)(void *opaque, uint8_t *buf, int len);
12 
13 #define ESP_REGS 16
14 #define ESP_FIFO_SZ 16
15 #define ESP_CMDFIFO_SZ 32
16 
17 enum ESPASCMode {
18     ESP_ASC_MODE_DIS = 0,    /* Disconnected */
19     ESP_ASC_MODE_INI = 1,    /* Initiator */
20     ESP_ASC_MODE_TGT = 2     /* Target */
21 };
22 
23 #define TYPE_ESP "esp"
24 OBJECT_DECLARE_SIMPLE_TYPE(ESPState, ESP)
25 
26 struct ESPState {
27     DeviceState parent_obj;
28 
29     uint8_t rregs[ESP_REGS];
30     uint8_t wregs[ESP_REGS];
31     qemu_irq irq;
32     qemu_irq drq_irq;
33     bool drq_state;
34     uint8_t chip_id;
35     bool tchi_written;
36     int32_t ti_size;
37     uint32_t status;
38     uint32_t dma;
39     Fifo8 fifo;
40     SCSIBus bus;
41     SCSIDevice *current_dev;
42     SCSIRequest *current_req;
43     Fifo8 cmdfifo;
44     uint8_t cmdfifo_cdb_offset;
45     uint8_t lun;
46     uint32_t do_cmd;
47     uint8_t asc_mode;
48 
49     bool data_ready;
50     int dma_enabled;
51 
52     uint32_t async_len;
53     uint8_t *async_buf;
54 
55     ESPDMAMemoryReadWriteFunc dma_memory_read;
56     ESPDMAMemoryReadWriteFunc dma_memory_write;
57     void *dma_opaque;
58     void (*dma_cb)(ESPState *s);
59 
60     uint8_t mig_version_id;
61 
62     /* Legacy fields for vmstate_esp version < 5 */
63     uint32_t mig_dma_left;
64     uint32_t mig_deferred_status;
65     bool mig_deferred_complete;
66     uint32_t mig_ti_rptr, mig_ti_wptr;
67     uint8_t mig_ti_buf[ESP_FIFO_SZ];
68     uint8_t mig_cmdbuf[ESP_CMDFIFO_SZ];
69     uint32_t mig_cmdlen;
70 
71     uint8_t mig_ti_cmd;
72 };
73 
74 #define TYPE_SYSBUS_ESP "sysbus-esp"
75 OBJECT_DECLARE_SIMPLE_TYPE(SysBusESPState, SYSBUS_ESP)
76 
77 struct SysBusESPState {
78     /*< private >*/
79     SysBusDevice parent_obj;
80     /*< public >*/
81 
82     MemoryRegion iomem;
83     MemoryRegion pdma;
84     uint32_t it_shift;
85     ESPState esp;
86 };
87 
88 #define ESP_TCLO   0x0
89 #define ESP_TCMID  0x1
90 #define ESP_FIFO   0x2
91 #define ESP_CMD    0x3
92 #define ESP_RSTAT  0x4
93 #define ESP_WBUSID 0x4
94 #define ESP_RINTR  0x5
95 #define ESP_WSEL   0x5
96 #define ESP_RSEQ   0x6
97 #define ESP_WSYNTP 0x6
98 #define ESP_RFLAGS 0x7
99 #define ESP_WSYNO  0x7
100 #define ESP_CFG1   0x8
101 #define ESP_RRES1  0x9
102 #define ESP_WCCF   0x9
103 #define ESP_RRES2  0xa
104 #define ESP_WTEST  0xa
105 #define ESP_CFG2   0xb
106 #define ESP_CFG3   0xc
107 #define ESP_RES3   0xd
108 #define ESP_TCHI   0xe
109 #define ESP_RES4   0xf
110 
111 #define CMD_DMA 0x80
112 #define CMD_CMD 0x7f
113 
114 #define CMD_GRP_MASK 0x70
115 
116 #define CMD_GRP_MISC 0x00
117 #define CMD_GRP_INIT 0x01
118 #define CMD_GRP_TRGT 0x02
119 #define CMD_GRP_DISC 0x04
120 
121 #define CMD_NOP      0x00
122 #define CMD_FLUSH    0x01
123 #define CMD_RESET    0x02
124 #define CMD_BUSRESET 0x03
125 #define CMD_TI       0x10
126 #define CMD_ICCS     0x11
127 #define CMD_MSGACC   0x12
128 #define CMD_PAD      0x18
129 #define CMD_SATN     0x1a
130 #define CMD_RSTATN   0x1b
131 #define CMD_SEL      0x41
132 #define CMD_SELATN   0x42
133 #define CMD_SELATNS  0x43
134 #define CMD_ENSEL    0x44
135 #define CMD_DISSEL   0x45
136 
137 #define STAT_DO 0x00
138 #define STAT_DI 0x01
139 #define STAT_CD 0x02
140 #define STAT_ST 0x03
141 #define STAT_MO 0x06
142 #define STAT_MI 0x07
143 #define STAT_PIO_MASK 0x06
144 
145 #define STAT_TC 0x10
146 #define STAT_PE 0x20
147 #define STAT_GE 0x40
148 #define STAT_INT 0x80
149 
150 #define BUSID_DID 0x07
151 
152 #define INTR_FC 0x08
153 #define INTR_BS 0x10
154 #define INTR_DC 0x20
155 #define INTR_IL 0x40
156 #define INTR_RST 0x80
157 
158 #define SEQ_0 0x0
159 #define SEQ_MO 0x1
160 #define SEQ_CD 0x4
161 
162 #define CFG1_RESREPT 0x40
163 
164 #define TCHI_FAS100A 0x4
165 #define TCHI_AM53C974 0x12
166 
167 void esp_dma_enable(ESPState *s, int irq, int level);
168 void esp_request_cancelled(SCSIRequest *req);
169 void esp_command_complete(SCSIRequest *req, size_t resid);
170 void esp_transfer_data(SCSIRequest *req, uint32_t len);
171 void esp_hard_reset(ESPState *s);
172 uint64_t esp_reg_read(ESPState *s, uint32_t saddr);
173 void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val);
174 extern const VMStateDescription vmstate_esp;
175 int esp_pre_save(void *opaque);
176 
177 #endif
178