1 /*
2 * ARM RealView Baseboard System emulation.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 #include "qemu/osdep.h"
11 #include "qapi/error.h"
12 #include "cpu.h"
13 #include "hw/sysbus.h"
14 #include "hw/arm/boot.h"
15 #include "hw/arm/primecell.h"
16 #include "hw/core/split-irq.h"
17 #include "hw/net/lan9118.h"
18 #include "hw/net/smc91c111.h"
19 #include "hw/pci/pci.h"
20 #include "hw/qdev-core.h"
21 #include "net/net.h"
22 #include "sysemu/sysemu.h"
23 #include "hw/boards.h"
24 #include "hw/i2c/i2c.h"
25 #include "qemu/error-report.h"
26 #include "hw/char/pl011.h"
27 #include "hw/cpu/a9mpcore.h"
28 #include "hw/intc/realview_gic.h"
29 #include "hw/irq.h"
30 #include "hw/i2c/arm_sbcon_i2c.h"
31 #include "hw/sd/sd.h"
32 #include "audio/audio.h"
33 #include "target/arm/cpu-qom.h"
34
35 #define SMP_BOOT_ADDR 0xe0000000
36 #define SMP_BOOTREG_ADDR 0x10000030
37
38 /* Board init. */
39
40 static struct arm_boot_info realview_binfo = {
41 .smp_loader_start = SMP_BOOT_ADDR,
42 .smp_bootreg_addr = SMP_BOOTREG_ADDR,
43 };
44
45 /* The following two lists must be consistent. */
46 enum realview_board_type {
47 BOARD_EB,
48 BOARD_EB_MPCORE,
49 BOARD_PB_A8,
50 BOARD_PBX_A9,
51 };
52
53 static const int realview_board_id[] = {
54 0x33b,
55 0x33b,
56 0x769,
57 0x76d
58 };
59
split_irq_from_named(DeviceState * src,const char * outname,qemu_irq out1,qemu_irq out2)60 static void split_irq_from_named(DeviceState *src, const char* outname,
61 qemu_irq out1, qemu_irq out2) {
62 DeviceState *splitter = qdev_new(TYPE_SPLIT_IRQ);
63
64 qdev_prop_set_uint32(splitter, "num-lines", 2);
65
66 qdev_realize_and_unref(splitter, NULL, &error_fatal);
67
68 qdev_connect_gpio_out(splitter, 0, out1);
69 qdev_connect_gpio_out(splitter, 1, out2);
70 qdev_connect_gpio_out_named(src, outname, 0,
71 qdev_get_gpio_in(splitter, 0));
72 }
73
realview_init(MachineState * machine,enum realview_board_type board_type)74 static void realview_init(MachineState *machine,
75 enum realview_board_type board_type)
76 {
77 ARMCPU *cpu = NULL;
78 CPUARMState *env;
79 MemoryRegion *sysmem = get_system_memory();
80 MemoryRegion *ram_lo;
81 MemoryRegion *ram_hi = g_new(MemoryRegion, 1);
82 MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
83 MemoryRegion *ram_hack = g_new(MemoryRegion, 1);
84 DeviceState *dev, *sysctl, *gpio2, *pl041;
85 SysBusDevice *busdev;
86 qemu_irq pic[64];
87 PCIBus *pci_bus = NULL;
88 DriveInfo *dinfo;
89 I2CBus *i2c;
90 int n;
91 unsigned int smp_cpus = machine->smp.cpus;
92 qemu_irq cpu_irq[4];
93 int is_mpcore = 0;
94 int is_pb = 0;
95 uint32_t proc_id = 0;
96 uint32_t sys_id;
97 ram_addr_t low_ram_size;
98 ram_addr_t ram_size = machine->ram_size;
99 hwaddr periphbase = 0;
100
101 switch (board_type) {
102 case BOARD_EB:
103 break;
104 case BOARD_EB_MPCORE:
105 is_mpcore = 1;
106 periphbase = 0x10100000;
107 break;
108 case BOARD_PB_A8:
109 is_pb = 1;
110 break;
111 case BOARD_PBX_A9:
112 is_mpcore = 1;
113 is_pb = 1;
114 periphbase = 0x1f000000;
115 break;
116 }
117
118 for (n = 0; n < smp_cpus; n++) {
119 Object *cpuobj = object_new(machine->cpu_type);
120
121 /* By default A9,A15 and ARM1176 CPUs have EL3 enabled. This board
122 * does not currently support EL3 so the CPU EL3 property is disabled
123 * before realization.
124 */
125 if (object_property_find(cpuobj, "has_el3")) {
126 object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
127 }
128
129 if (is_pb && is_mpcore) {
130 object_property_set_int(cpuobj, "reset-cbar", periphbase,
131 &error_fatal);
132 }
133
134 qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
135
136 cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ);
137 }
138 cpu = ARM_CPU(first_cpu);
139 env = &cpu->env;
140 if (arm_feature(env, ARM_FEATURE_V7)) {
141 if (is_mpcore) {
142 proc_id = 0x0c000000;
143 } else {
144 proc_id = 0x0e000000;
145 }
146 } else if (arm_feature(env, ARM_FEATURE_V6K)) {
147 proc_id = 0x06000000;
148 } else if (arm_feature(env, ARM_FEATURE_V6)) {
149 proc_id = 0x04000000;
150 } else {
151 proc_id = 0x02000000;
152 }
153
154 if (is_pb && ram_size > 0x20000000) {
155 /* Core tile RAM. */
156 ram_lo = g_new(MemoryRegion, 1);
157 low_ram_size = ram_size - 0x20000000;
158 ram_size = 0x20000000;
159 memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size,
160 &error_fatal);
161 memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
162 }
163
164 memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size,
165 &error_fatal);
166 low_ram_size = ram_size;
167 if (low_ram_size > 0x10000000)
168 low_ram_size = 0x10000000;
169 /* SDRAM at address zero. */
170 memory_region_init_alias(ram_alias, NULL, "realview.alias",
171 ram_hi, 0, low_ram_size);
172 memory_region_add_subregion(sysmem, 0, ram_alias);
173 if (is_pb) {
174 /* And again at a high address. */
175 memory_region_add_subregion(sysmem, 0x70000000, ram_hi);
176 } else {
177 ram_size = low_ram_size;
178 }
179
180 sys_id = is_pb ? 0x01780500 : 0xc1400400;
181 sysctl = qdev_new("realview_sysctl");
182 qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
183 qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
184 sysbus_realize_and_unref(SYS_BUS_DEVICE(sysctl), &error_fatal);
185 sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);
186
187 if (is_mpcore) {
188 dev = qdev_new(is_pb ? TYPE_A9MPCORE_PRIV : "realview_mpcore");
189 qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
190 busdev = SYS_BUS_DEVICE(dev);
191 sysbus_realize_and_unref(busdev, &error_fatal);
192 sysbus_mmio_map(busdev, 0, periphbase);
193 for (n = 0; n < smp_cpus; n++) {
194 sysbus_connect_irq(busdev, n, cpu_irq[n]);
195 }
196 sysbus_create_varargs("l2x0", periphbase + 0x2000, NULL);
197 /* Both A9 and 11MPCore put the GIC CPU i/f at base + 0x100 */
198 realview_binfo.gic_cpu_if_addr = periphbase + 0x100;
199 } else {
200 uint32_t gic_addr = is_pb ? 0x1e000000 : 0x10040000;
201 /* For now just create the nIRQ GIC, and ignore the others. */
202 dev = sysbus_create_simple(TYPE_REALVIEW_GIC, gic_addr, cpu_irq[0]);
203 }
204 for (n = 0; n < 64; n++) {
205 pic[n] = qdev_get_gpio_in(dev, n);
206 }
207
208 pl041 = qdev_new("pl041");
209 qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
210 if (machine->audiodev) {
211 qdev_prop_set_string(pl041, "audiodev", machine->audiodev);
212 }
213 sysbus_realize_and_unref(SYS_BUS_DEVICE(pl041), &error_fatal);
214 sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000);
215 sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]);
216
217 sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]);
218 sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]);
219
220 pl011_create(0x10009000, pic[12], serial_hd(0));
221 pl011_create(0x1000a000, pic[13], serial_hd(1));
222 pl011_create(0x1000b000, pic[14], serial_hd(2));
223 pl011_create(0x1000c000, pic[15], serial_hd(3));
224
225 /* DMA controller is optional, apparently. */
226 dev = qdev_new("pl081");
227 object_property_set_link(OBJECT(dev), "downstream", OBJECT(sysmem),
228 &error_fatal);
229 busdev = SYS_BUS_DEVICE(dev);
230 sysbus_realize_and_unref(busdev, &error_fatal);
231 sysbus_mmio_map(busdev, 0, 0x10030000);
232 sysbus_connect_irq(busdev, 0, pic[24]);
233
234 sysbus_create_simple("sp804", 0x10011000, pic[4]);
235 sysbus_create_simple("sp804", 0x10012000, pic[5]);
236
237 sysbus_create_simple("pl061", 0x10013000, pic[6]);
238 sysbus_create_simple("pl061", 0x10014000, pic[7]);
239 gpio2 = sysbus_create_simple("pl061", 0x10015000, pic[8]);
240
241 dev = qdev_new("pl111");
242 object_property_set_link(OBJECT(dev), "framebuffer-memory",
243 OBJECT(sysmem), &error_fatal);
244 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
245 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x10020000);
246 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[23]);
247
248 dev = sysbus_create_varargs("pl181", 0x10005000, pic[17], pic[18], NULL);
249 /* Wire up MMC card detect and read-only signals. These have
250 * to go to both the PL061 GPIO and the sysctl register.
251 * Note that the PL181 orders these lines (readonly,inserted)
252 * and the PL061 has them the other way about. Also the card
253 * detect line is inverted.
254 */
255 split_irq_from_named(dev, "card-read-only",
256 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_WPROT),
257 qdev_get_gpio_in(gpio2, 1));
258
259 split_irq_from_named(dev, "card-inserted",
260 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_CARDIN),
261 qemu_irq_invert(qdev_get_gpio_in(gpio2, 0)));
262
263 dinfo = drive_get(IF_SD, 0, 0);
264 if (dinfo) {
265 DeviceState *card;
266
267 card = qdev_new(TYPE_SD_CARD);
268 qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
269 &error_fatal);
270 qdev_realize_and_unref(card, qdev_get_child_bus(dev, "sd-bus"),
271 &error_fatal);
272 }
273
274 sysbus_create_simple("pl031", 0x10017000, pic[10]);
275
276 if (!is_pb) {
277 dev = qdev_new("realview_pci");
278 busdev = SYS_BUS_DEVICE(dev);
279 sysbus_realize_and_unref(busdev, &error_fatal);
280 sysbus_mmio_map(busdev, 0, 0x10019000); /* PCI controller registers */
281 sysbus_mmio_map(busdev, 1, 0x60000000); /* PCI self-config */
282 sysbus_mmio_map(busdev, 2, 0x61000000); /* PCI config */
283 sysbus_mmio_map(busdev, 3, 0x62000000); /* PCI I/O */
284 sysbus_mmio_map(busdev, 4, 0x63000000); /* PCI memory window 1 */
285 sysbus_mmio_map(busdev, 5, 0x64000000); /* PCI memory window 2 */
286 sysbus_mmio_map(busdev, 6, 0x68000000); /* PCI memory window 3 */
287 sysbus_connect_irq(busdev, 0, pic[48]);
288 sysbus_connect_irq(busdev, 1, pic[49]);
289 sysbus_connect_irq(busdev, 2, pic[50]);
290 sysbus_connect_irq(busdev, 3, pic[51]);
291 pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
292 if (machine_usb(machine)) {
293 pci_create_simple(pci_bus, -1, "pci-ohci");
294 }
295 n = drive_get_max_bus(IF_SCSI);
296 while (n >= 0) {
297 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
298 lsi53c8xx_handle_legacy_cmdline(dev);
299 n--;
300 }
301 }
302
303 if (qemu_find_nic_info(is_pb ? "lan9118" : "smc91c111", true, NULL)) {
304 if (is_pb) {
305 lan9118_init(0x4e000000, pic[28]);
306 } else {
307 smc91c111_init(0x4e000000, pic[28]);
308 }
309 }
310
311 if (pci_bus) {
312 pci_init_nic_devices(pci_bus, "rtl8139");
313 }
314
315 dev = sysbus_create_simple(TYPE_ARM_SBCON_I2C, 0x10002000, NULL);
316 i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
317 i2c_slave_create_simple(i2c, "ds1338", 0x68);
318
319 /* Memory map for RealView Emulation Baseboard: */
320 /* 0x10000000 System registers. */
321 /* 0x10001000 System controller. */
322 /* 0x10002000 Two-Wire Serial Bus. */
323 /* 0x10003000 Reserved. */
324 /* 0x10004000 AACI. */
325 /* 0x10005000 MCI. */
326 /* 0x10006000 KMI0. */
327 /* 0x10007000 KMI1. */
328 /* 0x10008000 Character LCD. (EB) */
329 /* 0x10009000 UART0. */
330 /* 0x1000a000 UART1. */
331 /* 0x1000b000 UART2. */
332 /* 0x1000c000 UART3. */
333 /* 0x1000d000 SSPI. */
334 /* 0x1000e000 SCI. */
335 /* 0x1000f000 Reserved. */
336 /* 0x10010000 Watchdog. */
337 /* 0x10011000 Timer 0+1. */
338 /* 0x10012000 Timer 2+3. */
339 /* 0x10013000 GPIO 0. */
340 /* 0x10014000 GPIO 1. */
341 /* 0x10015000 GPIO 2. */
342 /* 0x10002000 Two-Wire Serial Bus - DVI. (PB) */
343 /* 0x10017000 RTC. */
344 /* 0x10018000 DMC. */
345 /* 0x10019000 PCI controller config. */
346 /* 0x10020000 CLCD. */
347 /* 0x10030000 DMA Controller. */
348 /* 0x10040000 GIC1. (EB) */
349 /* 0x10050000 GIC2. (EB) */
350 /* 0x10060000 GIC3. (EB) */
351 /* 0x10070000 GIC4. (EB) */
352 /* 0x10080000 SMC. */
353 /* 0x1e000000 GIC1. (PB) */
354 /* 0x1e001000 GIC2. (PB) */
355 /* 0x1e002000 GIC3. (PB) */
356 /* 0x1e003000 GIC4. (PB) */
357 /* 0x40000000 NOR flash. */
358 /* 0x44000000 DoC flash. */
359 /* 0x48000000 SRAM. */
360 /* 0x4c000000 Configuration flash. */
361 /* 0x4e000000 Ethernet. */
362 /* 0x4f000000 USB. */
363 /* 0x50000000 PISMO. */
364 /* 0x54000000 PISMO. */
365 /* 0x58000000 PISMO. */
366 /* 0x5c000000 PISMO. */
367 /* 0x60000000 PCI. */
368 /* 0x60000000 PCI Self Config. */
369 /* 0x61000000 PCI Config. */
370 /* 0x62000000 PCI IO. */
371 /* 0x63000000 PCI mem 0. */
372 /* 0x64000000 PCI mem 1. */
373 /* 0x68000000 PCI mem 2. */
374
375 /* ??? Hack to map an additional page of ram for the secondary CPU
376 startup code. I guess this works on real hardware because the
377 BootROM happens to be in ROM/flash or in memory that isn't clobbered
378 until after Linux boots the secondary CPUs. */
379 memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000,
380 &error_fatal);
381 memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
382
383 realview_binfo.ram_size = ram_size;
384 realview_binfo.board_id = realview_board_id[board_type];
385 realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0);
386 arm_load_kernel(cpu, machine, &realview_binfo);
387 }
388
realview_eb_init(MachineState * machine)389 static void realview_eb_init(MachineState *machine)
390 {
391 realview_init(machine, BOARD_EB);
392 }
393
realview_eb_mpcore_init(MachineState * machine)394 static void realview_eb_mpcore_init(MachineState *machine)
395 {
396 realview_init(machine, BOARD_EB_MPCORE);
397 }
398
realview_pb_a8_init(MachineState * machine)399 static void realview_pb_a8_init(MachineState *machine)
400 {
401 realview_init(machine, BOARD_PB_A8);
402 }
403
realview_pbx_a9_init(MachineState * machine)404 static void realview_pbx_a9_init(MachineState *machine)
405 {
406 realview_init(machine, BOARD_PBX_A9);
407 }
408
realview_eb_class_init(ObjectClass * oc,void * data)409 static void realview_eb_class_init(ObjectClass *oc, void *data)
410 {
411 MachineClass *mc = MACHINE_CLASS(oc);
412
413 mc->desc = "ARM RealView Emulation Baseboard (ARM926EJ-S)";
414 mc->init = realview_eb_init;
415 mc->block_default_type = IF_SCSI;
416 mc->ignore_memory_transaction_failures = true;
417 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926");
418
419 machine_add_audiodev_property(mc);
420 }
421
422 static const TypeInfo realview_eb_type = {
423 .name = MACHINE_TYPE_NAME("realview-eb"),
424 .parent = TYPE_MACHINE,
425 .class_init = realview_eb_class_init,
426 };
427
realview_eb_mpcore_class_init(ObjectClass * oc,void * data)428 static void realview_eb_mpcore_class_init(ObjectClass *oc, void *data)
429 {
430 MachineClass *mc = MACHINE_CLASS(oc);
431
432 mc->desc = "ARM RealView Emulation Baseboard (ARM11MPCore)";
433 mc->init = realview_eb_mpcore_init;
434 mc->block_default_type = IF_SCSI;
435 mc->max_cpus = 4;
436 mc->ignore_memory_transaction_failures = true;
437 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm11mpcore");
438
439 machine_add_audiodev_property(mc);
440 }
441
442 static const TypeInfo realview_eb_mpcore_type = {
443 .name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
444 .parent = TYPE_MACHINE,
445 .class_init = realview_eb_mpcore_class_init,
446 };
447
realview_pb_a8_class_init(ObjectClass * oc,void * data)448 static void realview_pb_a8_class_init(ObjectClass *oc, void *data)
449 {
450 MachineClass *mc = MACHINE_CLASS(oc);
451
452 mc->desc = "ARM RealView Platform Baseboard for Cortex-A8";
453 mc->init = realview_pb_a8_init;
454 mc->ignore_memory_transaction_failures = true;
455 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
456
457 machine_add_audiodev_property(mc);
458 }
459
460 static const TypeInfo realview_pb_a8_type = {
461 .name = MACHINE_TYPE_NAME("realview-pb-a8"),
462 .parent = TYPE_MACHINE,
463 .class_init = realview_pb_a8_class_init,
464 };
465
realview_pbx_a9_class_init(ObjectClass * oc,void * data)466 static void realview_pbx_a9_class_init(ObjectClass *oc, void *data)
467 {
468 MachineClass *mc = MACHINE_CLASS(oc);
469
470 mc->desc = "ARM RealView Platform Baseboard Explore for Cortex-A9";
471 mc->init = realview_pbx_a9_init;
472 mc->max_cpus = 4;
473 mc->ignore_memory_transaction_failures = true;
474 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
475
476 machine_add_audiodev_property(mc);
477 }
478
479 static const TypeInfo realview_pbx_a9_type = {
480 .name = MACHINE_TYPE_NAME("realview-pbx-a9"),
481 .parent = TYPE_MACHINE,
482 .class_init = realview_pbx_a9_class_init,
483 };
484
realview_machine_init(void)485 static void realview_machine_init(void)
486 {
487 type_register_static(&realview_eb_type);
488 type_register_static(&realview_eb_mpcore_type);
489 type_register_static(&realview_pb_a8_type);
490 type_register_static(&realview_pbx_a9_type);
491 }
492
493 type_init(realview_machine_init)
494