1 /* 2 * Copyright (c) 2019 Red Hat, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2 or later, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 17 #ifndef HW_I386_X86_H 18 #define HW_I386_X86_H 19 20 #include "exec/hwaddr.h" 21 #include "system/memory.h" 22 23 #include "hw/boards.h" 24 #include "hw/i386/topology.h" 25 #include "hw/intc/ioapic.h" 26 #include "hw/isa/isa.h" 27 #include "qom/object.h" 28 #include "system/igvm-cfg.h" 29 30 struct X86MachineClass { 31 MachineClass parent; 32 33 /* use DMA capable linuxboot option rom */ 34 bool fwcfg_dma_enabled; 35 /* CPU and apic information: */ 36 bool apic_xrupt_override; 37 }; 38 39 struct X86MachineState { 40 /*< private >*/ 41 MachineState parent; 42 43 /*< public >*/ 44 45 /* Pointers to devices and objects: */ 46 ISADevice *rtc; 47 FWCfgState *fw_cfg; 48 qemu_irq *gsi; 49 DeviceState *ioapic2; 50 GMappedFile *initrd_mapped_file; 51 HotplugHandler *acpi_dev; 52 53 /* 54 * Map the whole BIOS just underneath the 4 GiB address boundary. Only used 55 * in the ROM (-bios) case. 56 */ 57 MemoryRegion bios; 58 59 /* 60 * Map the upper 128 KiB of the BIOS just underneath the 1 MiB address 61 * boundary. 62 */ 63 MemoryRegion isa_bios; 64 65 /* RAM information (sizes, addresses, configuration): */ 66 ram_addr_t below_4g_mem_size, above_4g_mem_size; 67 68 /* Start address of the initial RAM above 4G */ 69 uint64_t above_4g_mem_start; 70 71 /* CPU and apic information: */ 72 unsigned pci_irq_mask; 73 unsigned apic_id_limit; 74 uint16_t boot_cpus; 75 SgxEPCList *sgx_epc_list; 76 77 OnOffAuto smm; 78 OnOffAuto acpi; 79 OnOffAuto pit; 80 OnOffAuto pic; 81 82 char *oem_id; 83 char *oem_table_id; 84 /* 85 * Address space used by IOAPIC device. All IOAPIC interrupts 86 * will be translated to MSI messages in the address space. 87 */ 88 AddressSpace *ioapic_as; 89 90 /* 91 * Ratelimit enforced on detected bus locks in guest. 92 * The default value of the bus_lock_ratelimit is 0 per second, 93 * which means no limitation on the guest's bus locks. 94 */ 95 uint64_t bus_lock_ratelimit; 96 97 IgvmCfg *igvm; 98 }; 99 100 #define X86_MACHINE_SMM "smm" 101 #define X86_MACHINE_ACPI "acpi" 102 #define X86_MACHINE_PIT "pit" 103 #define X86_MACHINE_PIC "pic" 104 #define X86_MACHINE_OEM_ID "x-oem-id" 105 #define X86_MACHINE_OEM_TABLE_ID "x-oem-table-id" 106 #define X86_MACHINE_BUS_LOCK_RATELIMIT "bus-lock-ratelimit" 107 108 #define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86") 109 OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE) 110 111 void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms); 112 uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, 113 unsigned int cpu_index); 114 115 void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); 116 void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count); 117 void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, 118 DeviceState *dev, Error **errp); 119 void x86_cpu_plug(HotplugHandler *hotplug_dev, 120 DeviceState *dev, Error **errp); 121 void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 122 DeviceState *dev, Error **errp); 123 void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, 124 DeviceState *dev, Error **errp); 125 126 void x86_isa_bios_init(MemoryRegion *isa_bios, MemoryRegion *isa_memory, 127 MemoryRegion *bios, bool read_only); 128 void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, 129 MemoryRegion *rom_memory, bool isapc_ram_fw); 130 131 void x86_load_linux(X86MachineState *x86ms, 132 FWCfgState *fw_cfg, 133 int acpi_data_size, 134 bool pvh_enabled); 135 136 bool x86_machine_is_smm_enabled(const X86MachineState *x86ms); 137 bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms); 138 139 /* Global System Interrupts */ 140 141 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11)) 142 143 typedef struct GSIState { 144 qemu_irq i8259_irq[ISA_NUM_IRQS]; 145 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 146 qemu_irq ioapic2_irq[IOAPIC_NUM_PINS]; 147 } GSIState; 148 149 qemu_irq x86_allocate_cpu_irq(void); 150 void gsi_handler(void *opaque, int n, int level); 151 void ioapic_init_gsi(GSIState *gsi_state, Object *parent); 152 DeviceState *ioapic_init_secondary(GSIState *gsi_state); 153 154 /* pc_sysfw.c */ 155 void x86_firmware_configure(hwaddr gpa, void *ptr, int size); 156 157 #endif 158