1 /* Support for generating ACPI tables and passing them to Guests
2 *
3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
4 * Copyright (C) 2006 Fabrice Bellard
5 * Copyright (C) 2013 Red Hat Inc
6 *
7 * Author: Michael S. Tsirkin <mst@redhat.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, see <http://www.gnu.org/licenses/>.
21 */
22
23 #include "qemu/osdep.h"
24 #include "qapi/error.h"
25
26 #include "exec/memory.h"
27 #include "hw/acpi/acpi.h"
28 #include "hw/acpi/aml-build.h"
29 #include "hw/acpi/utils.h"
30 #include "target/i386/cpu.h"
31
32 #include "acpi-build.h"
33 #include "acpi-common.h"
34
pc_madt_cpu_entry(int uid,const CPUArchIdList * apic_ids,GArray * entry,bool force_enabled)35 void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
36 GArray *entry, bool force_enabled)
37 {
38 uint32_t apic_id = apic_ids->cpus[uid].arch_id;
39 /* Flags – Local APIC Flags */
40 uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
41 1 /* Enabled */ : 0;
42
43 /* ACPI spec says that LAPIC entry for non present
44 * CPU may be omitted from MADT or it must be marked
45 * as disabled. However omitting non present CPU from
46 * MADT breaks hotplug on linux. So possible CPUs
47 * should be put in MADT but kept disabled.
48 */
49 if (apic_id < 255) {
50 /* Rev 1.0b, Table 5-13 Processor Local APIC Structure */
51 build_append_int_noprefix(entry, 0, 1); /* Type */
52 build_append_int_noprefix(entry, 8, 1); /* Length */
53 build_append_int_noprefix(entry, uid, 1); /* ACPI Processor ID */
54 build_append_int_noprefix(entry, apic_id, 1); /* APIC ID */
55 build_append_int_noprefix(entry, flags, 4); /* Flags */
56 } else {
57 /* Rev 4.0, 5.2.12.12 Processor Local x2APIC Structure */
58 build_append_int_noprefix(entry, 9, 1); /* Type */
59 build_append_int_noprefix(entry, 16, 1); /* Length */
60 build_append_int_noprefix(entry, 0, 2); /* Reserved */
61 build_append_int_noprefix(entry, apic_id, 4); /* X2APIC ID */
62 build_append_int_noprefix(entry, flags, 4); /* Flags */
63 build_append_int_noprefix(entry, uid, 4); /* ACPI Processor UID */
64 }
65 }
66
build_ioapic(GArray * entry,uint8_t id,uint32_t addr,uint32_t irq)67 static void build_ioapic(GArray *entry, uint8_t id, uint32_t addr, uint32_t irq)
68 {
69 /* Rev 1.0b, 5.2.8.2 IO APIC */
70 build_append_int_noprefix(entry, 1, 1); /* Type */
71 build_append_int_noprefix(entry, 12, 1); /* Length */
72 build_append_int_noprefix(entry, id, 1); /* IO APIC ID */
73 build_append_int_noprefix(entry, 0, 1); /* Reserved */
74 build_append_int_noprefix(entry, addr, 4); /* IO APIC Address */
75 build_append_int_noprefix(entry, irq, 4); /* System Vector Base */
76 }
77
78 static void
build_xrupt_override(GArray * entry,uint8_t src,uint32_t gsi,uint16_t flags)79 build_xrupt_override(GArray *entry, uint8_t src, uint32_t gsi, uint16_t flags)
80 {
81 /* Rev 1.0b, 5.2.8.3.1 Interrupt Source Overrides */
82 build_append_int_noprefix(entry, 2, 1); /* Type */
83 build_append_int_noprefix(entry, 10, 1); /* Length */
84 build_append_int_noprefix(entry, 0, 1); /* Bus */
85 build_append_int_noprefix(entry, src, 1); /* Source */
86 /* Global System Interrupt Vector */
87 build_append_int_noprefix(entry, gsi, 4);
88 build_append_int_noprefix(entry, flags, 2); /* Flags */
89 }
90
91 /*
92 * ACPI spec, Revision 1.0b
93 * 5.2.8 Multiple APIC Description Table
94 */
acpi_build_madt(GArray * table_data,BIOSLinker * linker,X86MachineState * x86ms,const char * oem_id,const char * oem_table_id)95 void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
96 X86MachineState *x86ms,
97 const char *oem_id, const char *oem_table_id)
98 {
99 int i;
100 bool x2apic_mode = false;
101 MachineClass *mc = MACHINE_GET_CLASS(x86ms);
102 X86MachineClass *x86mc = X86_MACHINE_GET_CLASS(x86ms);
103 const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
104 AcpiTable table = { .sig = "APIC", .rev = 3, .oem_id = oem_id,
105 .oem_table_id = oem_table_id };
106
107 acpi_table_begin(&table, table_data);
108 /* Local APIC Address */
109 build_append_int_noprefix(table_data, APIC_DEFAULT_ADDRESS, 4);
110 /* Flags. bit 0: PCAT_COMPAT */
111 build_append_int_noprefix(table_data,
112 x86ms->pic != ON_OFF_AUTO_OFF ? 1 : 0 , 4);
113
114 for (i = 0; i < apic_ids->len; i++) {
115 pc_madt_cpu_entry(i, apic_ids, table_data, false);
116 if (apic_ids->cpus[i].arch_id > 254) {
117 x2apic_mode = true;
118 }
119 }
120
121 build_ioapic(table_data, ACPI_BUILD_IOAPIC_ID, IO_APIC_DEFAULT_ADDRESS, 0);
122 if (x86ms->ioapic2) {
123 build_ioapic(table_data, ACPI_BUILD_IOAPIC_ID + 1,
124 IO_APIC_SECONDARY_ADDRESS, IO_APIC_SECONDARY_IRQBASE);
125 }
126
127 if (x86mc->apic_xrupt_override) {
128 build_xrupt_override(table_data, 0, 2,
129 0 /* Flags: Conforms to the specifications of the bus */);
130 }
131
132 for (i = 1; i < 16; i++) {
133 if (!(x86ms->pci_irq_mask & (1 << i))) {
134 /* No need for a INT source override structure. */
135 continue;
136 }
137 build_xrupt_override(table_data, i, i,
138 0xd /* Flags: Active high, Level Triggered */);
139 }
140
141 if (x2apic_mode) {
142 /* Rev 4.0, 5.2.12.13 Local x2APIC NMI Structure*/
143 build_append_int_noprefix(table_data, 0xA, 1); /* Type */
144 build_append_int_noprefix(table_data, 12, 1); /* Length */
145 build_append_int_noprefix(table_data, 0, 2); /* Flags */
146 /* ACPI Processor UID */
147 build_append_int_noprefix(table_data, 0xFFFFFFFF /* all processors */,
148 4);
149 /* Local x2APIC LINT# */
150 build_append_int_noprefix(table_data, 1 /* ACPI_LINT1 */, 1);
151 build_append_int_noprefix(table_data, 0, 3); /* Reserved */
152 } else {
153 /* Rev 1.0b, 5.2.8.3.3 Local APIC NMI */
154 build_append_int_noprefix(table_data, 4, 1); /* Type */
155 build_append_int_noprefix(table_data, 6, 1); /* Length */
156 /* ACPI Processor ID */
157 build_append_int_noprefix(table_data, 0xFF /* all processors */, 1);
158 build_append_int_noprefix(table_data, 0, 2); /* Flags */
159 /* Local APIC INTI# */
160 build_append_int_noprefix(table_data, 1 /* ACPI_LINT1 */, 1);
161 }
162
163 acpi_table_end(linker, &table);
164 }
165
166