xref: /openbmc/qemu/hw/arm/b-l475e-iot01a.c (revision 49157207)
1 /*
2  * B-L475E-IOT01A Discovery Kit machine
3  * (B-L475E-IOT01A IoT Node)
4  *
5  * Copyright (c) 2023-2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
6  * Copyright (c) 2023-2024 Inès Varhol <ines.varhol@telecom-paris.fr>
7  *
8  * SPDX-License-Identifier: GPL-2.0-or-later
9  *
10  * This work is licensed under the terms of the GNU GPL, version 2 or later.
11  * See the COPYING file in the top-level directory.
12  *
13  * This work is heavily inspired by the netduinoplus2 by Alistair Francis.
14  * Original code is licensed under the MIT License:
15  *
16  * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
17  */
18 
19 /*
20  * The reference used is the STMicroElectronics UM2153 User manual
21  * Discovery kit for IoT node, multi-channel communication with STM32L4.
22  * https://www.st.com/en/evaluation-tools/b-l475e-iot01a.html#documentation
23  */
24 
25 #include "qemu/osdep.h"
26 #include "qapi/error.h"
27 #include "hw/boards.h"
28 #include "hw/qdev-properties.h"
29 #include "qemu/error-report.h"
30 #include "hw/arm/boot.h"
31 #include "hw/core/split-irq.h"
32 #include "hw/arm/stm32l4x5_soc.h"
33 #include "hw/gpio/stm32l4x5_gpio.h"
34 #include "hw/display/dm163.h"
35 
36 /* B-L475E-IOT01A implementation is inspired from netduinoplus2 and arduino */
37 
38 /*
39  * There are actually 14 input pins in the DM163 device.
40  * Here the DM163 input pin EN isn't connected to the STM32L4x5
41  * GPIOs as the IM120417002 colors shield doesn't actually use
42  * this pin to drive the RGB matrix.
43  */
44 #define NUM_DM163_INPUTS 13
45 
46 static const unsigned dm163_input[NUM_DM163_INPUTS] = {
47     1 * GPIO_NUM_PINS + 2,  /* ROW0  PB2       */
48     0 * GPIO_NUM_PINS + 15, /* ROW1  PA15      */
49     0 * GPIO_NUM_PINS + 2,  /* ROW2  PA2       */
50     0 * GPIO_NUM_PINS + 7,  /* ROW3  PA7       */
51     0 * GPIO_NUM_PINS + 6,  /* ROW4  PA6       */
52     0 * GPIO_NUM_PINS + 5,  /* ROW5  PA5       */
53     1 * GPIO_NUM_PINS + 0,  /* ROW6  PB0       */
54     0 * GPIO_NUM_PINS + 3,  /* ROW7  PA3       */
55     0 * GPIO_NUM_PINS + 4,  /* SIN (SDA) PA4   */
56     1 * GPIO_NUM_PINS + 1,  /* DCK (SCK) PB1   */
57     2 * GPIO_NUM_PINS + 3,  /* RST_B (RST) PC3 */
58     2 * GPIO_NUM_PINS + 4,  /* LAT_B (LAT) PC4 */
59     2 * GPIO_NUM_PINS + 5,  /* SELBK (SB)  PC5 */
60 };
61 
62 #define TYPE_B_L475E_IOT01A MACHINE_TYPE_NAME("b-l475e-iot01a")
63 OBJECT_DECLARE_SIMPLE_TYPE(Bl475eMachineState, B_L475E_IOT01A)
64 
65 typedef struct Bl475eMachineState {
66     MachineState parent_obj;
67 
68     Stm32l4x5SocState soc;
69     SplitIRQ gpio_splitters[NUM_DM163_INPUTS];
70     DM163State dm163;
71 } Bl475eMachineState;
72 
bl475e_init(MachineState * machine)73 static void bl475e_init(MachineState *machine)
74 {
75     Bl475eMachineState *s = B_L475E_IOT01A(machine);
76     const Stm32l4x5SocClass *sc;
77     DeviceState *dev, *gpio_out_splitter;
78     unsigned gpio, pin;
79 
80     object_initialize_child(OBJECT(machine), "soc", &s->soc,
81                             TYPE_STM32L4X5XG_SOC);
82     sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
83 
84     sc = STM32L4X5_SOC_GET_CLASS(&s->soc);
85     armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, 0,
86                        sc->flash_size);
87 
88     if (object_class_by_name(TYPE_DM163)) {
89         object_initialize_child(OBJECT(machine), "dm163",
90                                 &s->dm163, TYPE_DM163);
91         dev = DEVICE(&s->dm163);
92         qdev_realize(dev, NULL, &error_abort);
93 
94         for (unsigned i = 0; i < NUM_DM163_INPUTS; i++) {
95             object_initialize_child(OBJECT(machine), "gpio-out-splitters[*]",
96                                     &s->gpio_splitters[i], TYPE_SPLIT_IRQ);
97             gpio_out_splitter = DEVICE(&s->gpio_splitters[i]);
98             qdev_prop_set_uint32(gpio_out_splitter, "num-lines", 2);
99             qdev_realize(gpio_out_splitter, NULL, &error_fatal);
100 
101             qdev_connect_gpio_out(gpio_out_splitter, 0,
102                 qdev_get_gpio_in(DEVICE(&s->soc), dm163_input[i]));
103             qdev_connect_gpio_out(gpio_out_splitter, 1,
104                 qdev_get_gpio_in(dev, i));
105             gpio = dm163_input[i] / GPIO_NUM_PINS;
106             pin = dm163_input[i] % GPIO_NUM_PINS;
107             qdev_connect_gpio_out(DEVICE(&s->soc.gpio[gpio]), pin,
108                 qdev_get_gpio_in(DEVICE(gpio_out_splitter), 0));
109         }
110     }
111 }
112 
bl475e_machine_init(ObjectClass * oc,void * data)113 static void bl475e_machine_init(ObjectClass *oc, void *data)
114 {
115     MachineClass *mc = MACHINE_CLASS(oc);
116     static const char *machine_valid_cpu_types[] = {
117         ARM_CPU_TYPE_NAME("cortex-m4"),
118         NULL
119     };
120     mc->desc = "B-L475E-IOT01A Discovery Kit (Cortex-M4)";
121     mc->init = bl475e_init;
122     mc->valid_cpu_types = machine_valid_cpu_types;
123 
124     /* SRAM pre-allocated as part of the SoC instantiation */
125     mc->default_ram_size = 0;
126 }
127 
128 static const TypeInfo bl475e_machine_type[] = {
129     {
130         .name           = TYPE_B_L475E_IOT01A,
131         .parent         = TYPE_MACHINE,
132         .instance_size  = sizeof(Bl475eMachineState),
133         .class_init     = bl475e_machine_init,
134     }
135 };
136 
137 DEFINE_TYPES(bl475e_machine_type)
138