xref: /openbmc/linux/arch/arm/kernel/fiqasm.S (revision 6ebbf2ce) 
1/*
2 *  linux/arch/arm/kernel/fiqasm.S
3 *
4 *  Derived from code originally in linux/arch/arm/kernel/fiq.c:
5 *
6 *  Copyright (C) 1998 Russell King
7 *  Copyright (C) 1998, 1999 Phil Blundell
8 *  Copyright (C) 2011, Linaro Limited
9 *
10 *  FIQ support written by Philip Blundell <philb@gnu.org>, 1998.
11 *
12 *  FIQ support re-written by Russell King to be more generic
13 *
14 *  v7/Thumb-2 compatibility modifications by Linaro Limited, 2011.
15 */
16
17#include <linux/linkage.h>
18#include <asm/assembler.h>
19
20/*
21 * Taking an interrupt in FIQ mode is death, so both these functions
22 * disable irqs for the duration.
23 */
24
25ENTRY(__set_fiq_regs)
26	mov	r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
27	mrs	r1, cpsr
28	msr	cpsr_c, r2	@ select FIQ mode
29	mov	r0, r0		@ avoid hazard prior to ARMv4
30	ldmia	r0!, {r8 - r12}
31	ldr	sp, [r0], #4
32	ldr	lr, [r0]
33	msr	cpsr_c, r1	@ return to SVC mode
34	mov	r0, r0		@ avoid hazard prior to ARMv4
35	ret	lr
36ENDPROC(__set_fiq_regs)
37
38ENTRY(__get_fiq_regs)
39	mov	r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
40	mrs	r1, cpsr
41	msr	cpsr_c, r2	@ select FIQ mode
42	mov	r0, r0		@ avoid hazard prior to ARMv4
43	stmia	r0!, {r8 - r12}
44	str	sp, [r0], #4
45	str	lr, [r0]
46	msr	cpsr_c, r1	@ return to SVC mode
47	mov	r0, r0		@ avoid hazard prior to ARMv4
48	ret	lr
49ENDPROC(__get_fiq_regs)
50