xref: /openbmc/linux/drivers/phy/qualcomm/Kconfig (revision 08e49af5)
1# SPDX-License-Identifier: GPL-2.0-only
2#
3# Phy drivers for Qualcomm and Atheros platforms
4#
5config PHY_ATH79_USB
6	tristate "Atheros AR71XX/9XXX USB PHY driver"
7	depends on OF && (ATH79 || COMPILE_TEST)
8	default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM
9	select RESET_CONTROLLER
10	select GENERIC_PHY
11	help
12	  Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
13
14config PHY_QCOM_APQ8064_SATA
15	tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
16	depends on ARCH_QCOM
17	depends on HAS_IOMEM
18	depends on OF
19	select GENERIC_PHY
20
21config PHY_QCOM_EDP
22	tristate "Qualcomm eDP PHY driver"
23	depends on ARCH_QCOM || COMPILE_TEST
24	depends on OF
25	depends on COMMON_CLK
26	select GENERIC_PHY
27	help
28	  Enable this driver to support the Qualcomm eDP PHY found in various
29	  Qualcomm chipsets.
30
31config PHY_QCOM_IPQ4019_USB
32	tristate "Qualcomm IPQ4019 USB PHY driver"
33	depends on OF && (ARCH_QCOM || COMPILE_TEST)
34	select GENERIC_PHY
35	help
36	  Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
37
38config PHY_QCOM_IPQ806X_SATA
39	tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
40	depends on ARCH_QCOM
41	depends on HAS_IOMEM
42	depends on OF
43	select GENERIC_PHY
44
45config PHY_QCOM_PCIE2
46	tristate "Qualcomm PCIe Gen2 PHY Driver"
47	depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
48	select GENERIC_PHY
49	help
50	  Enable this to support the Qualcomm PCIe PHY, used with the Synopsys
51	  based PCIe controller.
52
53menuconfig PHY_QCOM_QMP
54	tristate "Qualcomm QMP PHY Drivers"
55	depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
56
57if PHY_QCOM_QMP
58
59config PHY_QCOM_QMP_COMBO
60	tristate "Qualcomm QMP Combo PHY Driver"
61	default PHY_QCOM_QMP
62	depends on TYPEC || TYPEC=n
63	depends on DRM || DRM=n
64	select GENERIC_PHY
65	select MFD_SYSCON
66	select DRM_PANEL_BRIDGE if DRM
67	help
68	  Enable this to support the QMP Combo PHY transceiver that is used
69	  with USB3 and DisplayPort controllers on Qualcomm chips.
70
71config PHY_QCOM_QMP_PCIE
72	tristate "Qualcomm QMP PCIe PHY Driver"
73	depends on PCI || COMPILE_TEST
74	select GENERIC_PHY
75	default PHY_QCOM_QMP
76	help
77	  Enable this to support the QMP PCIe PHY transceiver that is used
78	  with PCIe controllers on Qualcomm chips.
79
80config PHY_QCOM_QMP_PCIE_8996
81	tristate "Qualcomm QMP PCIe 8996 PHY Driver"
82	depends on PCI || COMPILE_TEST
83	select GENERIC_PHY
84	default PHY_QCOM_QMP
85	help
86	  Enable this to support the QMP PCIe PHY transceiver that is used
87	  with PCIe controllers on Qualcomm msm8996 chips.
88
89config PHY_QCOM_QMP_UFS
90	tristate "Qualcomm QMP UFS PHY Driver"
91	select GENERIC_PHY
92	default PHY_QCOM_QMP
93	help
94	  Enable this to support the QMP UFS PHY transceiver that is used
95	  with UFS controllers on Qualcomm chips.
96
97config PHY_QCOM_QMP_USB
98	tristate "Qualcomm QMP USB PHY Driver"
99	select GENERIC_PHY
100	default PHY_QCOM_QMP
101	help
102	  Enable this to support the QMP USB PHY transceiver that is used
103	  with USB3 controllers on Qualcomm chips.
104
105config PHY_QCOM_QMP_USB_LEGACY
106	tristate "Qualcomm QMP legacy USB PHY Driver"
107	select GENERIC_PHY
108	default n
109	help
110	  Enable this legacy driver to support the QMP USB+DisplayPort Combo
111	  PHY transceivers working only in USB3 mode on Qualcomm chips. This
112	  driver exists only for compatibility with older device trees,
113	  existing users have been migrated to PHY_QCOM_QMP_COMBO driver.
114
115endif # PHY_QCOM_QMP
116
117config PHY_QCOM_QUSB2
118	tristate "Qualcomm QUSB2 PHY Driver"
119	depends on OF && (ARCH_QCOM || COMPILE_TEST)
120	depends on NVMEM || !NVMEM
121	select GENERIC_PHY
122	help
123	  Enable this to support the HighSpeed QUSB2 PHY transceiver for USB
124	  controllers on Qualcomm chips. This driver supports the high-speed
125	  PHY which is usually paired with either the ChipIdea or Synopsys DWC3
126	  USB IPs on MSM SOCs.
127
128config PHY_QCOM_SNPS_EUSB2
129	tristate "Qualcomm SNPS eUSB2 PHY Driver"
130	depends on OF && (ARCH_QCOM || COMPILE_TEST)
131	select GENERIC_PHY
132	help
133	  Enable support for the USB high-speed SNPS eUSB2 phy on Qualcomm
134	  chipsets. The PHY is paired with a Synopsys DWC3 USB controller
135	  on Qualcomm SOCs.
136
137config PHY_QCOM_EUSB2_REPEATER
138	tristate "Qualcomm SNPS eUSB2 Repeater Driver"
139	depends on OF && (ARCH_QCOM || COMPILE_TEST)
140	select GENERIC_PHY
141	help
142	  Enable support for the USB high-speed SNPS eUSB2 repeater on Qualcomm
143	  PMICs. The repeater is paired with a Synopsys eUSB2 Phy
144	  on Qualcomm SOCs.
145
146config PHY_QCOM_M31_USB
147	tristate "Qualcomm M31 HS PHY driver support"
148	depends on USB && (ARCH_QCOM || COMPILE_TEST)
149	select GENERIC_PHY
150	help
151	  Enable this to support M31 HS PHY transceivers on Qualcomm chips
152	  with DWC3 USB core. It handles PHY initialization, clock
153	  management required after resetting the hardware and power
154	  management. This driver is required even for peripheral only or
155	  host only mode configurations.
156
157config PHY_QCOM_USB_HS
158	tristate "Qualcomm USB HS PHY module"
159	depends on USB_ULPI_BUS
160	depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
161	select GENERIC_PHY
162	help
163	  Support for the USB high-speed ULPI compliant phy on Qualcomm
164	  chipsets.
165
166config PHY_QCOM_USB_SNPS_FEMTO_V2
167	tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module"
168	depends on OF && (ARCH_QCOM || COMPILE_TEST)
169	select GENERIC_PHY
170	help
171	  Enable support for the USB high-speed SNPS Femto phy on Qualcomm
172	  chipsets.  This PHY has differences in the register map compared
173	  to the V1 variants.  The PHY is paired with a Synopsys DWC3 USB
174	  controller on Qualcomm SOCs.
175
176config PHY_QCOM_USB_HSIC
177	tristate "Qualcomm USB HSIC ULPI PHY module"
178	depends on USB_ULPI_BUS
179	select GENERIC_PHY
180	help
181	  Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
182
183config PHY_QCOM_USB_HS_28NM
184	tristate "Qualcomm 28nm High-Speed PHY"
185	depends on OF && (ARCH_QCOM || COMPILE_TEST)
186	depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
187	select GENERIC_PHY
188	help
189	  Enable this to support the Qualcomm Synopsys DesignWare Core 28nm
190	  High-Speed PHY driver. This driver supports the Hi-Speed PHY which
191	  is usually paired with either the ChipIdea or Synopsys DWC3 USB
192	  IPs on MSM SOCs.
193
194config PHY_QCOM_USB_SS
195	tristate "Qualcomm USB Super-Speed PHY driver"
196	depends on OF && (ARCH_QCOM || COMPILE_TEST)
197	depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
198	select GENERIC_PHY
199	help
200	  Enable this to support the Super-Speed USB transceiver on various
201	  Qualcomm chipsets.
202
203config PHY_QCOM_IPQ806X_USB
204	tristate "Qualcomm IPQ806x DWC3 USB PHY driver"
205	depends on HAS_IOMEM
206	depends on OF && (ARCH_QCOM || COMPILE_TEST)
207	select GENERIC_PHY
208	help
209	  This option enables support for the Synopsis PHYs present inside the
210	  Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports
211	  both HS and SS PHY controllers.
212
213config PHY_QCOM_SGMII_ETH
214	tristate "Qualcomm DWMAC SGMII SerDes/PHY driver"
215	depends on OF && (ARCH_QCOM || COMPILE_TEST)
216	depends on HAS_IOMEM
217	select GENERIC_PHY
218	help
219	  Enable this to support the internal SerDes/SGMII PHY on various
220	  Qualcomm chipsets.
221