1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2020 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8 /************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13 #ifndef ASIC_REG_DCORE0_MME_QM_ARC_DUP_ENG_AXUSER_REGS_H_ 14 #define ASIC_REG_DCORE0_MME_QM_ARC_DUP_ENG_AXUSER_REGS_H_ 15 16 /* 17 ***************************************** 18 * DCORE0_MME_QM_ARC_DUP_ENG_AXUSER 19 * (Prototype: AXUSER) 20 ***************************************** 21 */ 22 23 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_ASID 0x40C9900 24 25 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_MMU_BP 0x40C9904 26 27 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_STRONG_ORDER 0x40C9908 28 29 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_NO_SNOOP 0x40C990C 30 31 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_WR_REDUCTION 0x40C9910 32 33 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_RD_ATOMIC 0x40C9914 34 35 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_QOS 0x40C9918 36 37 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_RSVD 0x40C991C 38 39 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_EMEM_CPAGE 0x40C9920 40 41 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_CORE 0x40C9924 42 43 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_E2E_COORD 0x40C9928 44 45 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_WR_OVRD_LO 0x40C9930 46 47 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_WR_OVRD_HI 0x40C9934 48 49 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_RD_OVRD_LO 0x40C9938 50 51 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_HB_RD_OVRD_HI 0x40C993C 52 53 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_LB_COORD 0x40C9940 54 55 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_LB_LOCK 0x40C9944 56 57 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_LB_RSVD 0x40C9948 58 59 #define mmDCORE0_MME_QM_ARC_DUP_ENG_AXUSER_LB_OVRD 0x40C994C 60 61 #endif /* ASIC_REG_DCORE0_MME_QM_ARC_DUP_ENG_AXUSER_REGS_H_ */ 62