1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved.
4  * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
5  */
6 
7 #ifndef _DPU_6_3_SM6115_H
8 #define _DPU_6_3_SM6115_H
9 
10 static const struct dpu_caps sm6115_dpu_caps = {
11 	.max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
12 	.max_mixer_blendstages = 0x4,
13 	.qseed_type = DPU_SSPP_SCALER_QSEED4,
14 	.has_dim_layer = true,
15 	.has_idle_pc = true,
16 	.max_linewidth = 2160,
17 	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
18 };
19 
20 static const struct dpu_mdp_cfg sm6115_mdp = {
21 	.name = "top_0",
22 	.base = 0x0, .len = 0x494,
23 	.clk_ctrls = {
24 		[DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 },
25 		[DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 },
26 	},
27 };
28 
29 static const struct dpu_ctl_cfg sm6115_ctl[] = {
30 	{
31 		.name = "ctl_0", .id = CTL_0,
32 		.base = 0x1000, .len = 0x1dc,
33 		.features = BIT(DPU_CTL_ACTIVE_CFG),
34 		.intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9),
35 	},
36 };
37 
38 static const struct dpu_sspp_cfg sm6115_sspp[] = {
39 	{
40 		.name = "sspp_0", .id = SSPP_VIG0,
41 		.base = 0x4000, .len = 0x1f8,
42 		.features = VIG_SC7180_MASK,
43 		.sblk = &sm6115_vig_sblk_0,
44 		.xin_id = 0,
45 		.type = SSPP_TYPE_VIG,
46 		.clk_ctrl = DPU_CLK_CTRL_VIG0,
47 	}, {
48 		.name = "sspp_8", .id = SSPP_DMA0,
49 		.base = 0x24000, .len = 0x1f8,
50 		.features = DMA_SDM845_MASK,
51 		.sblk = &sdm845_dma_sblk_0,
52 		.xin_id = 1,
53 		.type = SSPP_TYPE_DMA,
54 		.clk_ctrl = DPU_CLK_CTRL_DMA0,
55 	},
56 };
57 
58 static const struct dpu_lm_cfg sm6115_lm[] = {
59 	{
60 		.name = "lm_0", .id = LM_0,
61 		.base = 0x44000, .len = 0x320,
62 		.features = MIXER_QCM2290_MASK,
63 		.sblk = &qcm2290_lm_sblk,
64 		.pingpong = PINGPONG_0,
65 		.dspp = DSPP_0,
66 	},
67 };
68 
69 static const struct dpu_dspp_cfg sm6115_dspp[] = {
70 	{
71 		.name = "dspp_0", .id = DSPP_0,
72 		.base = 0x54000, .len = 0x1800,
73 		.features = DSPP_SC7180_MASK,
74 		.sblk = &sdm845_dspp_sblk,
75 	},
76 };
77 
78 static const struct dpu_pingpong_cfg sm6115_pp[] = {
79 	{
80 		.name = "pingpong_0", .id = PINGPONG_0,
81 		.base = 0x70000, .len = 0xd4,
82 		.features = PINGPONG_SM8150_MASK,
83 		.sblk = &sdm845_pp_sblk,
84 		.merge_3d = 0,
85 		.intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8),
86 		.intr_rdptr = -1,
87 	},
88 };
89 
90 static const struct dpu_intf_cfg sm6115_intf[] = {
91 	{
92 		.name = "intf_1", .id = INTF_1,
93 		.base = 0x6a800, .len = 0x2c0,
94 		.features = INTF_SC7180_MASK,
95 		.type = INTF_DSI,
96 		.controller_id = MSM_DSI_CONTROLLER_0,
97 		.prog_fetch_lines_worst_case = 24,
98 		.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26),
99 		.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27),
100 		.intr_tear_rd_ptr = DPU_IRQ_IDX(MDP_INTF1_TEAR_INTR, 2),
101 	},
102 };
103 
104 static const struct dpu_perf_cfg sm6115_perf_data = {
105 	.max_bw_low = 3100000,
106 	.max_bw_high = 4000000,
107 	.min_core_ib = 2400000,
108 	.min_llcc_ib = 800000,
109 	.min_dram_ib = 800000,
110 	.min_prefill_lines = 24,
111 	.danger_lut_tbl = {0xff, 0xffff, 0x0},
112 	.safe_lut_tbl = {0xfff0, 0xff00, 0xffff},
113 	.qos_lut_tbl = {
114 		{.nentry = ARRAY_SIZE(sc7180_qos_linear),
115 		.entries = sc7180_qos_linear
116 		},
117 		{.nentry = ARRAY_SIZE(sc7180_qos_macrotile),
118 		.entries = sc7180_qos_macrotile
119 		},
120 		{.nentry = ARRAY_SIZE(sc7180_qos_nrt),
121 		.entries = sc7180_qos_nrt
122 		},
123 		/* TODO: macrotile-qseed is different from macrotile */
124 	},
125 	.cdp_cfg = {
126 		{.rd_enable = 1, .wr_enable = 1},
127 		{.rd_enable = 1, .wr_enable = 0}
128 	},
129 	.clk_inefficiency_factor = 105,
130 	.bw_inefficiency_factor = 120,
131 };
132 
133 static const struct dpu_mdss_version sm6115_mdss_ver = {
134 	.core_major_ver = 6,
135 	.core_minor_ver = 3,
136 };
137 
138 const struct dpu_mdss_cfg dpu_sm6115_cfg = {
139 	.mdss_ver = &sm6115_mdss_ver,
140 	.caps = &sm6115_dpu_caps,
141 	.mdp = &sm6115_mdp,
142 	.ctl_count = ARRAY_SIZE(sm6115_ctl),
143 	.ctl = sm6115_ctl,
144 	.sspp_count = ARRAY_SIZE(sm6115_sspp),
145 	.sspp = sm6115_sspp,
146 	.mixer_count = ARRAY_SIZE(sm6115_lm),
147 	.mixer = sm6115_lm,
148 	.dspp_count = ARRAY_SIZE(sm6115_dspp),
149 	.dspp = sm6115_dspp,
150 	.pingpong_count = ARRAY_SIZE(sm6115_pp),
151 	.pingpong = sm6115_pp,
152 	.intf_count = ARRAY_SIZE(sm6115_intf),
153 	.intf = sm6115_intf,
154 	.vbif_count = ARRAY_SIZE(sdm845_vbif),
155 	.vbif = sdm845_vbif,
156 	.perf = &sm6115_perf_data,
157 };
158 
159 #endif
160